- Jul 29, 2020
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Bruno Ricci authored
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Bruno Ricci authored
In general Decl::getASTContext() is relatively expensive and here the changes are non-invasive. NFC.
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Tres Popp authored
Differential Revision: https://reviews.llvm.org/D84832
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Sanjay Patel authored
There's a slight difference in functionality with the new CHECK lines: before, we allowed either -0.0 or 0.0 for maxnum/minnum. That matches the definition, but we should always get a deterministic result from constant folding within the compiler, so now we assert that we got the single expected result in all cases.
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Victor Campos authored
Fix testcase introduced in d1a3396b.
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Simon Pilgrim authored
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Victor Campos authored
A list of target features is disabled when there is no hardware floating-point support. This is the case when one of the following options is passed to clang: - -mfloat-abi=soft - -mfpu=none This option list is missing, however, the extension "+nofp" that can be specified in -march flags, such as "-march=armv8-a+nofp". This patch also disables unsupported target features when nofp is passed to -march. Differential Revision: https://reviews.llvm.org/D82948
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Andrew Ng authored
Differential Revision: https://reviews.llvm.org/D84749
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Simon Pilgrim authored
This will simplify target overrides, and matches what we do for most integer intrinsic costs.
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Stephan Herhut authored
`std.dim` currently only accepts ranked memrefs and `std.rank` is limited to tensors. Differential Revision: https://reviews.llvm.org/D84790
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David Green authored
This patch uses the feature added in D79162 to fix the cost of a sext/zext of a masked load, or a trunc for a masked store. Previously, those were considered cheap or even free, but it's not the case as we cannot split the load in the same way we would for normal loads. This updates the costs to better reflect reality, and adds a test for it in test/Analysis/CostModel/ARM/cast.ll. It also adds a vectorizer test that showcases the improvement: in some cases, the vectorizer will now choose a smaller VF when tail-predication is enabled, which results in better codegen. (Because if it were to use a higher VF in those cases, the code we see above would be generated, and the vmovs would block tail-predication later in the process, resulting in very poor codegen overall) Original Patch by Pierre van Houtryve Differential Revision: https://reviews.llvm.org/D79163
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David Green authored
Currently, getCastInstrCost has limited information about the cast it's rating, often just the opcode and types. Sometimes there is a context instruction as well, but it isn't trustworthy: for instance, when the vectorizer is rating a plan, it calls getCastInstrCost with the old instructions when, in fact, it's trying to evaluate the cost of the instruction post-vectorization. Thus, the current system can get the cost of certain casts incorrect as the correct cost can vary greatly based on the context in which it's used. For example, if the vectorizer queries getCastInstrCost to evaluate the cost of a sext(load) with tail predication enabled, getCastInstrCost will think it's free most of the time, but it's not always free. On ARM MVE, a VLD2 group cannot be extended like a normal VLDR can. Similar situations can come up with how masked loads can be extended when being split. To fix that, this path adds a new parameter to getCastInstrCost to give it a hint about the context of the cast. It adds a CastContextHint enum which contains the type of the load/store being created by the vectorizer - one for each of the types it can produce. Original patch by Pierre van Houtryve Differential Revision: https://reviews.llvm.org/D79162
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David Sherwood authored
I have added tests to: CodeGen/AArch64/sve-intrinsics-int-arith.ll for doing simple integer add operations on tuple types. Since these tests introduced new warnings due to incorrect use of getVectorNumElements() I have also fixed up these warnings in the same patch. These fixes are: 1. In narrowExtractedVectorBinOp I have changed the code to bail out early for scalable vector types, since we've not yet hit a case that proves the optimisations are profitable for scalable vectors. 2. In DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS I have replaced calls to getVectorNumElements with getVectorMinNumElements in cases that work with scalable vectors. For the other cases I have added asserts that the vector is not scalable because we should not be using shuffle vectors and build vectors in such cases. Differential revision: https://reviews.llvm.org/D84016
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Sjoerd Meijer authored
Optimize some specific immediates selection by materializing them with sub/mvn instructions as opposed to loading them from the constant pool. Patch by Ben Shi, powerman1st@163.com. Differential Revision: https://reviews.llvm.org/D83745
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Matt Arsenault authored
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Matt Arsenault authored
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Matt Arsenault authored
Remove the custom node boilerplate. Not sure why this tried to handle the LDS atomic stuff.
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Chris Gyurgyik authored
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David Sherwood authored
Previous patches fixed up all the warnings in this test: llvm/test/CodeGen/AArch64/sve-sext-zext.ll and this change simply checks that no new warnings are added in future. Differential revision: https://reviews.llvm.org/D83205
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David Sherwood authored
In DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR I have replaced calls to getVectorNumElements with getVectorMinNumElements, since this code path works for both fixed and scalable vector types. For scalable vectors the index will be multiplied by VSCALE. Fixes warnings in this test: sve-sext-zext.ll Differential revision: https://reviews.llvm.org/D83198
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Alex Zinenko authored
The current modeling of LLVM IR types in MLIR is based on the LLVMType class that wraps a raw `llvm::Type *` and delegates uniquing, printing and parsing to LLVM itself. This is model makes thread-safe type manipulation hard and is being progressively replaced with a cleaner MLIR model that replicates the type system. In the new model, LLVMType will no longer have an underlying LLVM IR type. Restrict access to this type in the current model in preparation for the change. Reviewed By: nicolasvasilache Differential Revision: https://reviews.llvm.org/D84389
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Florian Hahn authored
Without asserts, it might take a long time for the tests to crash. Only run them with assert builds.
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Yevgeny Rouban authored
In addition to removing phi nodes this patch removes any landing pad that the dead exit block might have. Without this fix Verifier complains about a new switch instruction jumps to a block with a landing pad. Differential Revision: https://reviews.llvm.org/D84320
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Pushpinder Singh authored
cmake was still considering the empty value of ${fake_version_inc} even if it was not defined. Reviewed By: vsapsai Differential Revision: https://reviews.llvm.org/D82847
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Simon Pilgrim authored
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Georgii Rymar authored
This introduces the printRelocationsHelper() which now contains the common code used by both GNU and LLVM output styles. Differential revision: https://reviews.llvm.org/D83935
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Hafiz Abid Qadeer authored
Libunwind uses _LIBUNWIND_IS_BAREMETAL in a lot of places but there is no cmake variable to set it. This patch adds such a variable. It is quite like what LIBCXXABI_BAREMETAL does in libcxxabi. Reviewed By: compnerd, #libunwind Differential Revision: https://reviews.llvm.org/D84759
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Frederik Gossen authored
Operating on indices and extent tensors directly, the type conversion is no longer needed for the supported cases. Differential Revision: https://reviews.llvm.org/D84442
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Stephan Herhut authored
This adds conversions for const_size and to_extent_tensor. Also, cast-like operations are now folded away if the source and target types are the same. Differential Revision: https://reviews.llvm.org/D84745
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Simon Pilgrim authored
If the mask input to getV4X86ShuffleImm8 only refers to a single source element (+ undefs) then canonicalize to a full broadcast. getV4X86ShuffleImm8 defaults to inline values for undefs, which can be useful for shuffle widening/narrowing but does leave SimplifyDemanded* calls thinking the shuffle depends on unnecessary elements. I'm still investigating what we should do more generally to avoid these undemanded elements, but broadcast cases was a simpler win.
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Frederik Gossen authored
Differential Revision: https://reviews.llvm.org/D84441
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Xing GUO authored
This patch makes the check lines stricter.
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Xing GUO authored
Normally, we use yaml::Hex* to describe the length, offsets, address/segment size. NFC.
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Kirill Bobyrev authored
Some buildbots require explicit clangdSupport dependency: http://lab.llvm.org:8011/builders/llvm-avr-linux/builds/3996/steps/build%20stage%201/logs/stdio
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George Mitenkov authored
Conversion of `spv.BranchConditional` now supports branch weights that are mapped to weights vector in `llvm.cond_br`. Reviewed By: antiagainst Differential Revision: https://reviews.llvm.org/D84657
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Nathan Ridge authored
Summary: It returned an invalid location in case of a constrained-parameter with no explicit arguments. Reviewers: hokein Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D84613
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Juneyoung Lee authored
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Stephan Bergmann authored
...which is set based on HAVE_RPC_XDR_H. At least Fedora 32 does not have a /usr/include/rpc/xdr.h, so failed this test introduced with <https://reviews.llvm.org/D83358> "[Sanitizers] Add interceptor for xdrrec_create". Differential Revision: https://reviews.llvm.org/D84740
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George Mitenkov authored
Added a check for 'Function' storage class in `spv.globalVariable` verifier since it only can be used with `spv.Variable`. Reviewed By: antiagainst Differential Revision: https://reviews.llvm.org/D84731
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George Mitenkov authored
This patch adds support of Volatile and Nontemporal memory accesses to `spv.Load` and `spv.Store`. These attributes are modelled with a `volatile` and `nontemporal` flags. Reviewed By: antiagainst Differential Revision: https://reviews.llvm.org/D84739
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