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  1. Dec 04, 2017
    • Kamil Rytarowski's avatar
      Move __tsan::Vector to __sanitizer · 64fc9cf2
      Kamil Rytarowski authored
      Summary:
      The low-fat STL-like vector container will be reused in MSan.
      
      It is needed to implement an atexit(3) interceptor on NetBSD/amd64 in MSan.
      
      Sponsored by <The NetBSD Foundation>
      
      Reviewers: joerg, dvyukov, eugenis, vitalybuka, kcc
      
      Reviewed By: dvyukov
      
      Subscribers: kubamracek, mgorny, llvm-commits, #sanitizers
      
      Tags: #sanitizers
      
      Differential Revision: https://reviews.llvm.org/D40726
      
      llvm-svn: 319650
      64fc9cf2
    • Oliver Stannard's avatar
      [Asm, ARM] Add fallback diag for multiple invalid operands · 7cd4db94
      Oliver Stannard authored
      This adds a "invalid operands for instruction" diagnostic for
      instructions where there is an instruction encoding with the correct
      mnemonic and which is available for this target, but where multiple
      operands do not match those which were provided. This makes it clear
      that there is some combination of operands that is valid for the current
      target, which the default diagnostic of "invalid instruction" does not.
      
      Since this is a very general error, we only emit it if we don't have a
      more specific error.
      
      Differential revision: https://reviews.llvm.org/D36747
      
      llvm-svn: 319649
      7cd4db94
    • Peter Smith's avatar
      [ELF] Add BYTE expression to test case for non-contiguous relro [NFC] · 014be8ac
      Peter Smith authored
      As well as location counter expressions. The data generating expressions
      such as BYTE can generate a non-zero sized OutputSection that will report
      0 until assignAddresses() is called. Add an example to the existing test
      case relro-non-contiguous-script-data.s.
      
      Differential Revision: https://reviews.llvm.org/D40732
      
      llvm-svn: 319648
      014be8ac
    • Sam McCall's avatar
      [clangd] GlobalCompilationDatabase interface changes · ecbeab0e
      Sam McCall authored
      Summary:
      - GlobalCompilationDatabase now returns a single command (that's all we use)
      - fallback flags are now part of the GlobalCompilationDatabase.
        There's a default implementation that they can optionally customize.
      - this allows us to avoid invoking the fallback logic on two separate codepaths
      - race on extra flags fixed by locking the mutex
      - made GCD const-correct (DBGCD does have mutating methods)
      
      Reviewers: hokein
      
      Subscribers: klimek, cfe-commits, ilya-biryukov
      
      Differential Revision: https://reviews.llvm.org/D40733
      
      llvm-svn: 319647
      ecbeab0e
    • Jonas Paulsson's avatar
      [TwoAddressInstructionPass] Bugfix in handling of sunk instructions. · e86327f2
      Jonas Paulsson authored
      An instruction returned by TII->convertToThreeAddress() may contain a %noreg
      (undef) operand, which is not expected by tryInstructionTransform(). So if
      this MI is sunk to a lower point in MBB, it must be skipped when later
      encountered.
      
      A new set SunkInstrs is used for this purpose.
      
      Note: there is no test supplied here, as this was triggered on SystemZ while
      working on a review of instruction flags. A test case for this bugfix will be
      included in the upcoming SystemZ commit.
      
      Review: Quentin Colombet
      https://reviews.llvm.org/D40711
      
      llvm-svn: 319646
      e86327f2
    • Sam Parker's avatar
      [DAGCombine] Remove isAndLoadExtLoad arguments · 1e26d986
      Sam Parker authored
      Both LoadedVT and NarrowLoad are passed as references and neither
      of them are used by any of its callers.
      
      Differential Revision: https://reviews.llvm.org/D40713
      
      llvm-svn: 319645
      1e26d986
    • Martin Storsjö's avatar
      [AArch64] Allow using emulated tls on platforms other than ELF · eca862de
      Martin Storsjö authored
      This matches how it is done on X86.
      
      This allows using emulated tls on windows; in MinGW environments,
      native tls isn't supported at the moment.
      
      Set the right Data*bitsDirective for windows to match the existing
      tests for other platforms. Make parts of the existing tests a regex,
      to allow matching .section .rdata for windows, to avoid having to
      duplicate the rest of the tests for windows.
      
      Differential Revision: https://reviews.llvm.org/D40770
      
      llvm-svn: 319644
      eca862de
    • Martin Storsjö's avatar
      [ARM] Allow using emulated tls on platforms other than ELF · c85cc418
      Martin Storsjö authored
      This matches how it is done on X86.
      
      This allows using emulated tls on windows; in MinGW environments,
      native tls isn't supported at the moment.
      
      Differential Revision: https://reviews.llvm.org/D40769
      
      llvm-svn: 319643
      c85cc418
    • Manuel Klimek's avatar
      Fix bug where we wouldn't break columns over the limit. · 48c930cb
      Manuel Klimek authored
      Before, we would not break:
        int a = foo(/* trailing */);
      when the end of /* trailing */ was exactly the column limit; the reason
      is that block comments can have an unbreakable tail length - in this case
      2, for the trailing ");"; we would unconditionally account that when
      calculating the column state at the end of the token, but not correctly
      add it into the remaining column length before, as we do for string
      literals.
      The fix is to correctly account the trailing unbreakable sequence length
      into our formatting decisions for block comments. Line comments cannot
      have a trailing unbreakable sequence, so no change is needed for them.
      
      llvm-svn: 319642
      48c930cb
    • Craig Topper's avatar
      [X86] Allow VPMAXUQ/VPMAXSQ/VPMINUQ/VPMINSQ to be used with 128/256 bit... · 4520d4f8
      Craig Topper authored
      [X86] Allow VPMAXUQ/VPMAXSQ/VPMINUQ/VPMINSQ to be used with 128/256 bit vectors when AVX512 is enabled.
      
      These instructions can be used by widening to 512-bits and extracting back to 128/256. We do similar to several other instructions already.
      
      llvm-svn: 319641
      4520d4f8
    • Craig Topper's avatar
      [X86] Don't turn UINT_TO_FP into SINT_TO_FP during lowering. · 1151facf
      Craig Topper authored
      We already do this as a DAG combine. The version during lowering can only trigger if known bits changes something that improves known bits analysis. But this means we should be improving known bits analysis to work on the unlowered form instead.
      
      llvm-svn: 319640
      1151facf
    • Craig Topper's avatar
      [SelectionDAG] Teach computeKnownBits some improvements to ISD::SRL with a... · 67217d7e
      Craig Topper authored
      [SelectionDAG] Teach computeKnownBits some improvements to ISD::SRL with a non-splat constant shift amount.
      
      If we have a non-splat constant shift amount, the minimum shift amount can be used to infer the number of zero upper bits of the result. There's probably a lot more that we can do here, but this
      fixes a case where I wanted to infer the sign bit as zero when all the shift amounts are non-zero.
      
      llvm-svn: 319639
      67217d7e
    • Devin Coughlin's avatar
      [analyzer] Don't treat lambda-captures float constexprs as undefined · a565a7b9
      Devin Coughlin authored
      RegionStore has special logic to evaluate captured constexpr variables.
      However, if the constexpr initializer cannot be evaluated as an integer, the
      value is treated as undefined. This leads to false positives when, for example,
      a constexpr float is captured by a lambda.
      
      To fix this, treat a constexpr capture that cannot be evaluated as unknown
      rather than undefined.
      
      rdar://problem/35784662
      
      llvm-svn: 319638
      a565a7b9
  2. Dec 03, 2017
  3. Dec 02, 2017
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