Rather than duplicating data fields, use DeclSpec directly to store
the qualifiers for the functions/methods. This change doesn't handle
attributes yet and has to be extended further.

Differential revision: https://reviews.llvm.org/D55948

llvm-svn: 350703

Follow up patch of rL350385, for adding predres
command line option. This patch renames the
feature as to keep it aligned with the option
passed by/to clang

Differential Revision: https://reviews.llvm.org/D56484

llvm-svn: 350702

llvm-svn: 350701

llvm-svn: 350700

Summary:
This fixes PR39710. In that case we emitted a location list looking like
this:

.Ldebug_loc0:
        .quad   .Lfunc_begin0-.Lfunc_begin0
        .quad   .Lfunc_begin0-.Lfunc_begin0
        .short  1                       # Loc expr size
        .byte   85                      # DW_OP_reg5
        .quad   .Lfunc_begin0-.Lfunc_begin0
        .quad   .Lfunc_end0-.Lfunc_begin0
        .short  1                       # Loc expr size
        .byte   85                      # super-register DW_OP_reg5
        .quad   0
        .quad   0

As seen, the first entry's beginning and ending addresses evalute to 0,
which meant that the entry inadvertently became an "end of list" entry,
resulting in the location list ending sooner than expected.

To fix this, omit all entries with empty ranges. Location list entries
with empty ranges do not have any effect, as specified by DWARF, so we
might as well drop them:

"A location list entry (but not a base address selection or end of list
 entry) whose beginning and ending addresses are equal has no effect
 because the size of the range covered by such an entry is zero."

Reviewers: davide, aprantl, dblaikie

Reviewed By: aprantl

Subscribers: javed.absar, JDevlieghere, llvm-commits

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D55919

llvm-svn: 350698

llvm-svn: 350697

[X86] Make the pointer arguments to avx512 gather/scatter intrinsics 'void*' to match gcc and Intel's documentation.

The avx2 gather intrinsics are documented to use 'int', 'long long', 'float', or 'double' *. So I'm leaving those. This matches gcc.

llvm-svn: 350696

llvm-svn: 350695

Current strategy of dropping `InstructionPrecedenceTracking` cache is to
invalidate the entire basic block whenever we change its contents. In fact,
`InstructionPrecedenceTracking` has 2 internal strictures: `OrderedInstructions`
that is needed to be invalidated whenever the contents changes, and the map
with first special instructions in block. This second map does not need an
update if we add/remove a non-special instuction because it cannot
affect the contents of this map.

This patch changes API of `InstructionPrecedenceTracking` so that it now
accounts for reasons under which we invalidate blocks. This should lead
to much less recalculations of the map and should save us some compile time
because in practice we don't typically add/remove special instructions.

Differential Revision: https://reviews.llvm.org/D54462
Reviewed By: efriedma

llvm-svn: 350694

Revert "[PowerPC] Fix assert from machine verify pass that unmatched register class about fcmp selection in fast-isel"

This reverts commit r350685.

See compile assert in compiler-rt.

llvm-svn: 350693

llvm-svn: 350692

llvm-svn: 350690

Most significantly, this makes bin/llvm-lit executable so that it
can be run in the usual way.

Differential Revision: https://reviews.llvm.org/D56423

llvm-svn: 350688

[X86] Correct the MaskVT for avx512 gather/scatter intrinsics to use the min of the number of index and data elements.

When the result type is v2i64/v2f64 and the index element size is i32, the index vector has two unused elements making the type v4i32. The mask VT should match the number of memory accesses that will be made.

This is consistent with the isel patterns used for the target independent gather/scatter intrinsic.

llvm-svn: 350687

Convert the output of "git rev-parse --short HEAD" to a string before
substituting it into the output file. Without this the output file
will look like this on Python 3:

 #define LLVM_REVISION "git-b'6a4895a025f'"

Differential Revision: https://reviews.llvm.org/D56459

llvm-svn: 350686

[PowerPC] Fix assert from machine verify pass that unmatched register class about fcmp selection in fast-isel

Bad machine code: Illegal virtual register for instruction

function: TestULE
basic block: %bb.0 entry (0x1000a39b158)
instruction: %2:crrc = FCMPUD %1:vsfrc, %3:f8rc
operand 1: %1:vsfrc

Fix assert about missing match between fcmp instruction and register class. 
We should use vsx related cmp instruction xvcmpudp instead of fcmpu when vsx is opened.

add -verifymachineinstrs option into related test cases to enable the verify pass.


Differential Revision: https://reviews.llvm.org/D55686

llvm-svn: 350685

This removes check for single use from general ShrinkDemandedConstant
to the BE because of the AArch64 regression after D56289/rL350475.

After several hours of experiments I did not come up with a testcase
failing on any other targets if check is not performed.

Moreover, direct call to ShrinkDemandedConstant is not really needed
and superceed by SimplifyDemandedBits.

Differential Revision: https://reviews.llvm.org/D56406

llvm-svn: 350684

Now that memory intrinsics are instrumented, it's more likely that
CheckAddressSized will be called with size 0. (It was possible before
with IR like:

  %val = load [0 x i8], [0 x i8]* %ptr

but I don't think clang will generate IR like that and the optimizer
would normally remove it by the time it got anywhere near our pass
anyway). The right thing to do in both cases is to disable the
addressing checks (since the underlying memory intrinsic is a no-op),
so that's what we do.

Differential Revision: https://reviews.llvm.org/D56465

llvm-svn: 350683

llvm-svn: 350682

ARM and AArch64 use TLS variant 1, where the first two words after the
thread pointer are reserved for the TCB, followed by the executable's TLS
segment. Both the thread pointer and the TLS segment are aligned to at
least the TLS segment's alignment.

Android/Bionic historically has not supported ELF TLS, and it has
allocated memory after the thread pointer for several Bionic TLS slots
(currently 9 but soon only 8). At least one of these allocations
(TLS_SLOT_STACK_GUARD == 5) is widespread throughout Android/AArch64
binaries and can't be changed.

To reconcile this disagreement about TLS memory layout, set the minimum
alignment for executable TLS segments to 8 words on ARM/AArch64, which
reserves at least 8 words of memory after the TP (2 for the ABI-specified
TCB and 6 for alignment padding). For simplicity, and because lld doesn't
know when it's targeting Android, increase the alignment regardless of
operating system.

Differential Revision: https://reviews.llvm.org/D53906

llvm-svn: 350681

The '.stringVal' field in ExprEvalResult is allocated using new[],
but was freed using a regular delete. That caused memory leaks in
the test from r350666.

llvm-svn: 350680

LLVM added wrappers to std::sort (r327219) that randomly shuffle the
container before sorting. The goal is to uncover non-determinism due to
undefined sorting order of objects having the same key.

This can be enabled with -DLLVM_ENABLE_EXPENSIVE_CHECKS=ON.

llvm-svn: 350679

Currently it's possible for following
check on V.WriteLanes (which is not really meaningful
during SubRangeJoin) to pass for one half of the pair,
and then fall through to to one of the impossible
or unresolved states. This then fails as inconsistent
on the other half.

During the main range join, the check between V.WriteLanes
and OtherV.ValidLanes must have passed, meaning this
should be a CR_Replace.

Fixes most of the testcases in bugs 39542 and 39602

llvm-svn: 350678

Reviewers: aaron.ballman

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D55337

llvm-svn: 350677

We can't go back and recover the lanes if it turns
out the implicit_def really can't be erased.

Assume all lanes are valid if an unresolved conflict
is encountered. There aren't any tests where this
seems to matter either way, but this seems like a
safer option.

Fixes bug 39602

llvm-svn: 350676

Summary: The member is private and unused if HAVE_LIBCOMPRESSION is undefined, which triggers Clang's -Wunused-private-field warning.

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D56458

llvm-svn: 350675

These changed with rL350672.

llvm-svn: 350674

This patch improves llvm-profdata show command:
(1) add -value-cutoff=<N> option: Show only those functions whose max count
    values are greater or equal to N.
(2) add -list-below-cutoff option: Only output names of functions whose max
    count value are below the cutoff.
(3) formats value-profile counts and prints out percentage.

Differential Revision: https://reviews.llvm.org/D56342

llvm-svn: 350673

This is matching the equivalent of the DAG expansion, 
so it should never end up with worse perf than the 
original code even if the target doesn't have a rotate
instruction.

llvm-svn: 350672

In LTO or Thin-lto mode (though linker plugin), the module
names are of temp file names which are different for
different compilations. Using SourceFileName avoids the issue.
This should not change any functionality for current PGO as
all the current callers of getPGOFuncName() is before LTO.

Differential Revision: https://reviews.llvm.org/D56327

llvm-svn: 350671

Will re-commit it using the correct commit message.

llvm-svn: 350670

Summary:
StoreResults pass does not optimize store instructions anymore because
store instructions don't return results values anymore. Now this pass is
used solely for memory intrinsics, so update the pass name accordingly
and fix outdated pass descriptions as well.

This patch does not change any meaningful behavior, but not marked as
NFC because it changes a comment check line in a test case.

Reviewers: dschuff

Subscribers: mgorny, sbc100, jgravelle-google, sunfiish, llvm-commits

Differential Revision: https://reviews.llvm.org/D56093

llvm-svn: 350669

Summary: The Android NDK still uses GNU binutils by default.

Reviewers: srhines, pirama

Reviewed By: srhines

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D56456

llvm-svn: 350668

Will re-commit it using the correct commit message.

llvm-svn: 350667

The original commit had a memory leak in the test has a leak as it doesn't
dispose of the evaluated cursor result.

This also contains the follow-up NFC refactoring commit r336591.

rdar://45893054

Original commit message:

[libclang] evalute compound statement cursors before trying to evaluate
the cursor like a declaration

This change fixes a bug in libclang in which it tries to evaluate a statement
cursor as a declaration cursor, because that statement still has a pointer to
the declaration parent.

rdar://38888477

Differential Revision: https://reviews.llvm.org/D49051

llvm-svn: 350666

Summary:
This way, when the generic ASTTraverser is extracted from ASTDumper,
there can't be any problem related to ordering of class members, a
concern that was raised in https://reviews.llvm.org/D55337.

This will also preserve the property that the generic traverser does not
enforce any coupling between the NodeDumper and the TreeStructure.

 https://godbolt.org/z/PEtT1_

Reviewers: aaron.ballman, erichkeane

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D56407

llvm-svn: 350665

Reviewers: pirama, srhines

Reviewed By: srhines

Subscribers: kristina, cfe-commits

Differential Revision: https://reviews.llvm.org/D55953

llvm-svn: 350664

Improve the modeling of ALU instructions.

llvm-svn: 350663

Add more entropy to the test cases.

llvm-svn: 350662

llvm-svn: 350661