Commits · fdd9df1952c962fc8e2e14861c095d12f55947dc · Lorenzo Albano / LLVM bpEVL · GitLab

Mar 31, 2023
- [M68k] Add AssemblerPredicate to existing `AtLeast680x0` predicates · 94a74b9d
  Min-Yih Hsu authored Mar 31, 2023
  94a74b9d
- [RISCV] Add named constants for rounding mode to tablegen. NFC · efc5b518
  Craig Topper authored Mar 31, 2023
  efc5b518
- [RISCV] Collapse loadfp32imm/loadfp64imm/loadfp16imm to a single Operand in tablegen · 9ec147e3
  Craig Topper authored Mar 31, 2023
  9ec147e3
- [RISCV] Fix Zfa fceil/ffloor codegen bugs · 4bbbae61
  Jun Sha (Joshua) authored Mar 31, 2023
  4bbbae61
- [RISCV] Fix formatting in RISCVInstrInfoZfa.td. NFC · a1786a72
  Craig Topper authored Mar 31, 2023
  a1786a72
- [DAG] Add SelectionDAG::SplitScalar helper · 8153b92d
  Simon Pilgrim authored Mar 31, 2023
  8153b92d
- [AARCH64] Enable STORE of v4i8 to help more vectorization opportunities · a72162cc
  Guozhi Wei authored Mar 31, 2023
  a72162cc
- [RISCV] Lower inline asm m with offset to register+imm. · 6217f472
  Mikhail R. Gadelha authored Mar 31, 2023
  6217f472
- [X86] MatchVectorAllZeroTest - add support for icmp(bitcast(icmp_ne(X,Y)),0)... · aab8b2eb
  Simon Pilgrim authored Mar 31, 2023
  aab8b2eb
- [AMDGPU] Don't bother to use OffsetMode to define Real SMEM instructions · bdf52b5d
  Jay Foad authored Mar 30, 2023
  bdf52b5d
- [AMDGPU] Do not reserve 16-bit registers · 8bad806f
  Jay Foad authored Mar 29, 2023
  8bad806f
- Revert "[AMDGPU] Select v_sat_pk_u8_i16" · 16e1f8e9
  pvanhout authored Mar 31, 2023
  16e1f8e9
- [AMDGPU] Fix whitespace after D147216 · 6b6303ac
  Jay Foad authored Mar 31, 2023
  
  6b6303ac
- ARMFrameLowering.cpp - fix MSVC "result of 32-bit shift implicitly converted... · b2061453
  Simon Pilgrim authored Mar 31, 2023
  b2061453
- [ARM] Handle generating SEH unwind info for t2STR_PRE/t2LDR_POST · c5383536
  Martin Storsjö authored Mar 30, 2023
  c5383536
- [LoongArch] Optimize additions with immediates · ec37a35a
  Ben Shi authored Mar 31, 2023
  ec37a35a
- [WASM] Prevent casting `undef` to `CosntantSDNode` · 3b247691
  Peter Rong authored Mar 29, 2023
  3b247691
- [WASM] Fix legalizer for LowerBUILD_VECTOR. · 51a93828
  Peter Rong authored Mar 30, 2023
  51a93828
- [RISCV] Add Zicsr and Zifencei to CPUs in RISCVProcessors.td. · 96a7e057
  Craig Topper authored Mar 30, 2023
  96a7e057
- [RISCV] Correct the EvenSrc/OddSrc computation in isInterleaveShuffle. · f2315545
  Craig Topper authored Mar 30, 2023
  f2315545
- [RISCV] Bump I, F, D, and A extension versions to 20191214 spec version · dc90af50
  Craig Topper authored Mar 30, 2023
  dc90af50
Mar 30, 2023
- [RISCV] Add codegen for the experimental zicond extension · a755e80e
  Alex Bradbury authored Mar 30, 2023
  a755e80e
- [RISCV] Slightly weaken expanded seq_cst atomic op to match reference mapping in in the spec · 5b070596
  Alex Bradbury authored Mar 30, 2023
  5b070596
- AMDGPU: Created a subclass for the return address operand in the tail call return instruction · 7a98934f
  Changpeng Fang authored Mar 30, 2023
  7a98934f
- [AMDGPU][GlobalISel] Add support for S_INDIRECT_REG_WRITE_MOVREL_B32_V[9|10|11|12] · 48f6964b
  Mateja Marjanovic authored Mar 30, 2023
  
  48f6964b
- [AMDGPU][AsmParser] Refine SMRD offset definitions. · 51148439
  Ivan Kosarev authored Mar 30, 2023
  51148439
- [AMDGPU][AsmParser][NFC] Refine immediate operand definitions. · 32f46ef0
  Ivan Kosarev authored Mar 30, 2023
  32f46ef0
- [AMDGPU] Reduce repetition in SMEM instruction definitions · 939fbef3
  Jay Foad authored Mar 30, 2023
  939fbef3
- [amdgpu] Fix broken error detection in LDS lowering · 75c7019b
  Jon Chesterfield authored Mar 30, 2023
  75c7019b
- [X86] LowerVectorAllZero - use MOVMSKPS for comparisons coming from vXi32/vXi64 vectors · b0c89229
  Simon Pilgrim authored Mar 29, 2023
  b0c89229
- [X86] combineVectorShiftImm - fold (shift (logic X, C2), C1) -> (logic (shift... · 4e211404
  Simon Pilgrim authored Mar 29, 2023
  4e211404
- [AMDGPU] TableGen syntax cleanups · 44f0c914
  Jay Foad authored Mar 30, 2023
  
  44f0c914
- [AMDGPU] Remove two unused ComplexRendererFns · c75e266d
  Jay Foad authored Mar 30, 2023
  c75e266d
- [AArch64] Extend icmp bitcast to vecreduce fold to comparison with -1 · 5213834f
  Nikita Popov authored Mar 21, 2023
  5213834f
- [WASM] Precommit WebAssemblyISelLowering.cpp format changes for D147198 · 163d7bb9
  Peter Rong authored Mar 29, 2023
  163d7bb9
- [ARM] Use isNullConstant and isOneConstant (NFC) · 847b7f35
  Kazu Hirata authored Mar 29, 2023
  
  847b7f35
- [MachineScheduler] Rename postprocessDAG to postProcessDAG. NFC · 50f2ce49
  jacquesguan authored Mar 24, 2023
  50f2ce49
- [DAG][RISCV] Allow scalable vector ISD::STRICT_FP_ROUND and support vector... · 84c8c2b4
  Yeting Kuo authored Mar 29, 2023
  84c8c2b4
- [RISCV] Add helper function for RVV intrinsics in getTgtMemIntrinsic. NFC · 98798a5a
  Craig Topper authored Mar 29, 2023
  98798a5a
- [RISCV] Move allWUsers from RISCVInstrInfo to RISCVOptWInstrs. · 3d7fa6dc
  Craig Topper authored Mar 29, 2023
  3d7fa6dc