llvm-svn: 132772

llvm-svn: 132771

llvm-svn: 132768

llvm-svn: 132767

assuming that all offsets are legal vector accesses, and thus trying to access
the float member of { <2 x float>, float } as the 3rd element of the first
member.

llvm-svn: 132766

of the frame then increase the maximum alignment of the frame to
match.

Fixes PR6965

llvm-svn: 132764

No functional change.

Part of PR6965

llvm-svn: 132763

former was using the size of the entire alloca, whereas the latter was correctly using
the allocated size of the immediate type being converted (which may differ from the size
of the alloca). This fixes PR10082.

llvm-svn: 132759

dynamically allocated stack area was not set.

llvm-svn: 132758

llvm-svn: 132756

llvm-svn: 132751

llvm-svn: 132749

llvm-svn: 132748

operands to an early clobber register. This fixes <rdar://problem/9566076>.

llvm-svn: 132738

Fixes PR10095.

llvm-svn: 132735

llvm-svn: 132726

llvm-svn: 132725

- Fix indentation.
- Move comments.
- Fit lines in 80 columns.
- Remove dead code.

llvm-svn: 132724

llvm-svn: 132718

llvm-svn: 132717

llvm-svn: 132715

Add test case for C++ exception handling and fix the following mistakes in MipsFrameLowering::emitPrologue:

- cfi directives are not inserted at the right location or in the right order.
- The source MachineLocation for the cfi directive that changes the cfa register
  to $fp should be MachineLocation::VirtualFP.
- A PROLOG_LABEL that marks the beginning of cfi_offset directives for
  callee-saved register is emitted even when no callee-saved registers are
  saved.
- When a callee-saved double precision register is saved, two cfi_offset
  directives, one for each of the paired single precision registers, should be
  emitted.
 
 

llvm-svn: 132703

I've been sitting on this long enough trying to find a test case. I
think the fix should go in now, but I'll keep working on the test case.

llvm-svn: 132701

rdar://problem/9556069

llvm-svn: 132699

When local live range splitting creates a live range with the same
number of instructions as the old range, mark it as RS_Local. When such
a range is seen again, require that it be split in a way that reduces
the number of instructions. That guarantees we are making progress while
still being able to perform 3 -> 2+3 splits as required by PR10070.

This also means that the PrevSlot map is no longer needed. This was also
used to estimate new spill weights, but that is no longer necessary
after slotIndexes::insertMachineInstrInMaps() got the extra Late
insertion argument.

llvm-svn: 132697

load.  rdar://problem/6373334

llvm-svn: 132696

Only target-dependent hints require callbacks. The RCI allocation order
has CSR aliases last according to their order of appearance in the
getCalleeSavedRegs list. This can depend on the calling convention.

This way, AllocationOrder::next doesn't have to check for reserved
registers, and CSRs are always allocated last, even with weird calling
conventions.

llvm-svn: 132690

legalize SDNodes such as BUILD_VECTOR, EXTRACT_VECTOR_ELT, etc.

llvm-svn: 132689

llvm-svn: 132681

The order of registers returned by getCalleeSavedRegs is used to lay out
the fixed stack slots for CSRs. Some targets like their CSRs used from
one end, and some targets want them used from the other end.

When computing an allocation order, simply preserve the relative
ordering of CSRs that the target specifies in its allocation order.
Reordering CSRs would break some targets, ARM in particular.

We still place volatiles before the CSRs, providing slightly better
results with different calling conventions.

llvm-svn: 132680

llvm-svn: 132676

llvm-svn: 132668

We still don't handle

* default values
* :req
* :vararg
* \()

llvm-svn: 132656

VK_GOTOFF reloc. This matches as' behavior, but it is not clear why the linker
might need this, so I added a FIXME.

I could test this by duplicating test/MC/ELF/got.s, but it doesn't look
worthwhile.

llvm-svn: 132655

TypeLegalizer: Add support for passing of vector-promoted types in registers (copyFromParts/copyToParts).

llvm-svn: 132649

(only happens when using the -promote-elements option).

The correct legalization order is to first try to promote element. Next, we try
to widen vectors.

llvm-svn: 132648

rules. Also refactor "read string until quote" into its own function. No
functionality change!

llvm-svn: 132645

llvm-svn: 132643

then we don't want to set the destination in the indirect branch to the
destination. This is because the indirect branch needs its destinations to have
had their block addresses taken. This isn't so of the new critical edge that's
split during this process. If it turns out that the destination block has only
one predecessor, and that being a BB with an indirect branch, then it won't be
marked as 'used' and may be removed.
PR10072

llvm-svn: 132638

is disabled.

llvm-svn: 132632