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  1. Dec 10, 2012
    • Eric Christopher's avatar
      Delete the FissionCU. · 8afd7b60
      Eric Christopher authored
      llvm-svn: 169757
      8afd7b60
    • Eric Christopher's avatar
      Reorder fission variables. · d79f5480
      Eric Christopher authored
      llvm-svn: 169756
      d79f5480
    • Bill Wendling's avatar
      Don't use a red zone for code coverage if the user specified `-mno-red-zone'. · 74f334e4
      Bill Wendling authored
      The `-mno-red-zone' flag wasn't being propagated to the functions that code
      coverage generates. This allowed some of them to use the red zone when that
      wasn't allowed.
      <rdar://problem/12843084>
      
      llvm-svn: 169754
      74f334e4
    • Nadav Rotem's avatar
      Add support for reverse induction variables. For example: · 7b5b55c1
      Nadav Rotem authored
      while (i--)
       sum+=A[i];
      
      llvm-svn: 169752
      7b5b55c1
    • Jim Grosbach's avatar
      CMake: Don't run 'git svn' if there is no .git/svn directory. · f7cbcf26
      Jim Grosbach authored
      If the local checkout does not have 'git svn' references set up, don't try
      to use 'git svn' for version information.
      
      llvm-svn: 169749
      f7cbcf26
    • Eli Bendersky's avatar
      This patch adds statistics for other non-DWARF fragments emitted by · c01322ee
      Eli Bendersky authored
      the assembler. This is useful in order to know how the numbers add up,
      since in particular the Align fragments account for a non-trivial
      portion of the emitted fragments (especially on -O0 which sets
      relax-all).
      
      llvm-svn: 169747
      c01322ee
    • Hal Finkel's avatar
      Use GetUnderlyingObjects in misched · 66859ae0
      Hal Finkel authored
      misched used GetUnderlyingObject in order to break false load/store
      dependencies, and the -enable-aa-sched-mi feature similarly relied on
      GetUnderlyingObject in order to ensure it is safe to use the aliasing analysis.
      Unfortunately, GetUnderlyingObject does not recurse through phi nodes, and so
      (especially due to LSR) all of these mechanisms failed for
      induction-variable-dependent loads and stores inside loops.
      
      This change replaces uses of GetUnderlyingObject with GetUnderlyingObjects
      (which will recurse through phi and select instructions) in misched.
      
      Andy reviewed, tested and simplified this patch; Thanks!
      
      llvm-svn: 169744
      66859ae0
    • Sean Silva's avatar
      Fix funky copy-pasted grammatical error. · aab278fb
      Sean Silva authored
      PR14343
      
      llvm-svn: 169742
      aab278fb
    • Chandler Carruth's avatar
      Revert "Make '-mtune=x86_64' assume fast unaligned memory accesses." · 867c7bff
      Chandler Carruth authored
      Accidental commit... git svn betrayed me. Sorry for the noise.
      
      llvm-svn: 169741
      867c7bff
    • Chandler Carruth's avatar
      Make '-mtune=x86_64' assume fast unaligned memory accesses. · 7eaa45c7
      Chandler Carruth authored
      Summary:
      Not all chips targeted by x86_64 have this feature, but a dramatically
      increasing number do. Specifying a chip-specific tuning parameter will
      continue to turn the feature on or off as appropriate for that
      particular chip, but the generic flag should try to achieve the best
      performance on the most widely available hardware. Today, the number of
      chips with fast UA access dwarfs those without in the x86-64 space.
      
      Note that this also brings LLVM's code generation for this '-march' flag
      more in line with that of modern GCCs.
      
      CC: llvm-commits
      
      Differential Revision: http://llvm-reviews.chandlerc.com/D195
      
      llvm-svn: 169740
      7eaa45c7
    • Chandler Carruth's avatar
      Fix a typo in my previous commit -- bloomfield is 0x1A not 0x2A. · 17f25c4e
      Chandler Carruth authored
      Thanks to the PaX folks for noticing in review! We need some tests here,
      any sugestions welcome...
      
      llvm-svn: 169739
      17f25c4e
    • Chandler Carruth's avatar
      Address a FIXME and update the fast unaligned memory feature for newer · 0f585581
      Chandler Carruth authored
      Intel chips.
      
      The model number rules were determined by inspecting Intel's
      documentation for their newer chip model numbers. My understanding is
      that all of the newer Intel chips have fast unaligned memory access, but
      if anyone is concerned about a particular chip, just shout.
      
      No tests updated; it's not clear we have dedicated tests for the chips'
      various features, but if anyone would like tests (or can point me at
      some existing ones), I'm happy to oblige.
      
      llvm-svn: 169730
      0f585581
    • Chandler Carruth's avatar
      Add a new visitor for walking the uses of a pointer value. · e41e7b79
      Chandler Carruth authored
      This visitor provides infrastructure for recursively traversing the
      use-graph of a pointer-producing instruction like an alloca or a malloc.
      It maintains a worklist of uses to visit, so it can handle very deep
      recursions. It automatically looks through instructions which simply
      translate one pointer to another (bitcasts and GEPs). It tracks the
      offset relative to the original pointer as long as that offset remains
      constant and exposes it during the visit as an APInt offset. Finally, it
      performs conservative escape analysis.
      
      However, currently it has some limitations that should be addressed
      going forward:
      1) It doesn't handle vectors of pointers.
      2) It doesn't provide a cheaper visitor when the constant offset
         tracking isn't needed.
      3) It doesn't support non-instruction pointer values.
      
      The current functionality is exactly what is required to implement the
      SROA pointer-use visitors in terms of this one, rather than in terms of
      their own ad-hoc base visitor, which was always very poorly specified.
      SROA has been converted to use this, and the code there deleted which
      this utility now provides.
      
      Technically speaking, using this new visitor allows SROA to handle a few
      more cases than it previously did. It is now more aggressive in ignoring
      chains of instructions which look like they would defeat SROA, but in
      fact do not because they never result in a read or write of memory.
      While this is "neat", it shouldn't be interesting for real programs as
      any such chains should have been removed by others passes long before we
      get to SROA. As a consequence, I've not added any tests for these
      features -- it shouldn't be part of SROA's contract to perform such
      heroics.
      
      The goal is to extend the functionality of this visitor going forward,
      and re-use it from passes like ASan that can benefit from doing
      a detailed walk of the uses of a pointer.
      
      Thanks to Ben Kramer for the code review rounds and lots of help
      reviewing and debugging this patch.
      
      llvm-svn: 169728
      e41e7b79
    • Craig Topper's avatar
      Teach DAG combine to handle vector add/sub with vectors of all 0s. · d8005db4
      Craig Topper authored
      llvm-svn: 169727
      d8005db4
    • NAKAMURA Takumi's avatar
      f9573f11
    • NAKAMURA Takumi's avatar
      6b819c5f
    • Bill Wendling's avatar
      Revert to old behavior until linker can pass export-dynamic option. · 39d38093
      Bill Wendling authored
      llvm-svn: 169720
      39d38093
    • Chandler Carruth's avatar
      Fix PR14548: SROA was crashing on a mixture of i1 and i8 loads and stores. · e45f4658
      Chandler Carruth authored
      When SROA was evaluating a mixture of i1 and i8 loads and stores, in
      just a particular case, it would tickle a latent bug where we compared
      bits to bytes rather than bits to bits. As a consequence of the latent
      bug, we would allow integers through which were not byte-size multiples,
      a situation the later rewriting code was never intended to handle.
      
      In release builds this could trigger all manner of oddities, but the
      reported issue in PR14548 was forming invalid bitcast instructions.
      
      The only downside of this fix is that it makes it more clear that SROA
      in its current form is not capable of handling mixed i1 and i8 loads and
      stores. Sometimes with the previous code this would work by luck, but
      usually it would crash, so I'm not terribly worried. I'll watch the LNT
      numbers just to be sure.
      
      llvm-svn: 169719
      e45f4658
    • Dmitri Gribenko's avatar
      Documentation: convert ReleaseNotes.html to reST. · 38782b8e
      Dmitri Gribenko authored
      Patch by Anthony Mykhailenko with small fixes by me.
      
      llvm-svn: 169714
      38782b8e
  2. Dec 09, 2012
  3. Dec 08, 2012
    • Craig Topper's avatar
      Teach DAG combine to handle vector logical operations with vectors of all 1s... · a183ddb0
      Craig Topper authored
      Teach DAG combine to handle vector logical operations with vectors of all 1s or all 0s. These cases can show up when vectors are split for legalizing. Fix some tests that were dependent on these cases not being combined.
      
      llvm-svn: 169684
      a183ddb0
    • Chandler Carruth's avatar
      Revert the patches adding a popcount loop idiom recognition pass. · 91e47532
      Chandler Carruth authored
      There are still bugs in this pass, as well as other issues that are
      being worked on, but the bugs are crashers that occur pretty easily in
      the wild. Test cases have been sent to the original commit's review
      thread.
      
      This reverts the commits:
        r169671: Fix a logic error.
        r169604: Move the popcnt tests to an X86 subdirectory.
        r168931: Initial commit adding the pass.
      
      llvm-svn: 169683
      91e47532
    • Benjamin Kramer's avatar
      Simplify code. Sort includes. No functionality change. · f242d8c3
      Benjamin Kramer authored
      llvm-svn: 169676
      f242d8c3
    • Logan Chien's avatar
      Fix Windows build breakage. · 6ebca4be
      Logan Chien authored
      Windows does not have <stdint.h>, should include
      "llvm/Support/DataTypes.h" instead.
      
      llvm-svn: 169672
      6ebca4be
    • Shuxin Yang's avatar
      Fix an inadvertent typo error. · 9c5c9764
      Shuxin Yang authored
      llvm-svn: 169671
      9c5c9764
    • Chandler Carruth's avatar
      Fix a use-after-free bug found by ASan. You can't assign a temporary · 1d94e932
      Chandler Carruth authored
      std::string to a StringRef. Moreover, the method being called accepts
      a Twine to simplify these patterns.
      
      Fixes this ASan failure:
      ==6312== ERROR: AddressSanitizer: heap-use-after-free on address 0x7fd558b1af58 at pc 0xcb7529 bp 0x7fffff572080 sp 0x7fffff572078
      READ of size 1 at 0x7fd558b1af58 thread T0
          #0 0xcb7528 .../llvm/include/llvm/ADT/StringRef.h:192 llvm::StringRef::operator[]()
          #1 0x1d53c0a .../llvm/include/llvm/ADT/StringExtras.h:128 llvm::HashString()
          #2 0x1d53878 .../llvm/lib/Support/StringMap.cpp:64 llvm::StringMapImpl::LookupBucketFor()
          #3 0x1b6872f .../llvm/include/llvm/ADT/StringMap.h:352 llvm::StringMap<>::GetOrCreateValue<>()
          #4 0x1b61836 .../llvm/lib/MC/MCContext.cpp:109 llvm::MCContext::GetOrCreateSymbol()
          #5 0xe9fd47 .../llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp:154 (anonymous namespace)::ARMELFStreamer::EmitMappingSymbol()
          #6 0xea01dd .../llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp:133 (anonymous namespace)::ARMELFStreamer::EmitDataMappingSymbol()
          #7 0xe9f78b .../llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp:91 (anonymous namespace)::ARMELFStreamer::EmitBytes()
          #8 0x1b15d82 .../llvm/lib/MC/MCStreamer.cpp:89 llvm::MCStreamer::EmitIntValue()
          #9 0xcc0f9b .../llvm/lib/Target/ARM/ARMAsmPrinter.cpp:713 llvm::ARMAsmPrinter::emitAttributes()
          #10 0xcc0d44 .../llvm/lib/Target/ARM/ARMAsmPrinter.cpp:632 llvm::ARMAsmPrinter::EmitStartOfAsmFile()
          #11 0x14692ad .../llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:162 llvm::AsmPrinter::doInitialization()
          #12 0x1bc4677 .../llvm/lib/VMCore/PassManager.cpp:1561 llvm::FPPassManager::doInitialization()
          #13 0x1bc4990 .../llvm/lib/VMCore/PassManager.cpp:1595 llvm::MPPassManager::runOnModule()
          #14 0x1bc55e5 .../llvm/lib/VMCore/PassManager.cpp:1705 llvm::PassManagerImpl::run()
          #15 0x1bc5878 .../llvm/lib/VMCore/PassManager.cpp:1740 llvm::PassManager::run()
          #16 0xc3954d .../llvm/tools/llc/llc.cpp:378 compileModule()
          #17 0xc38001 .../llvm/tools/llc/llc.cpp:194 main
          #18 0x7fd557d6a11c __libc_start_main
      0x7fd558b1af58 is located 24 bytes inside of 29-byte region [0x7fd558b1af40,0x7fd558b1af5d)
      freed by thread T0 here:
          #0 0xc337da .../llvm/projects/compiler-rt/lib/asan/asan_new_delete.cc:56 operator delete()
          #1 0x1ee9cef .../libstdc++-v3/include/bits/basic_string.h:535 std::string::~string()
          #2 0xea01dd .../llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp:133 (anonymous namespace)::ARMELFStreamer::EmitDataMappingSymbol()
          #3 0xe9f78b .../llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp:91 (anonymous namespace)::ARMELFStreamer::EmitBytes()
          #4 0x1b15d82 .../llvm/lib/MC/MCStreamer.cpp:89 llvm::MCStreamer::EmitIntValue()
          #5 0xcc0f9b .../llvm/lib/Target/ARM/ARMAsmPrinter.cpp:713 llvm::ARMAsmPrinter::emitAttributes()
          #6 0xcc0d44 .../llvm/lib/Target/ARM/ARMAsmPrinter.cpp:632 llvm::ARMAsmPrinter::EmitStartOfAsmFile()
          #7 0x14692ad .../llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:162 llvm::AsmPrinter::doInitialization()
          #8 0x1bc4677 .../llvm/lib/VMCore/PassManager.cpp:1561 llvm::FPPassManager::doInitialization()
          #9 0x1bc4990 .../llvm/lib/VMCore/PassManager.cpp:1595 llvm::MPPassManager::runOnModule()
          #10 0x1bc55e5 .../llvm/lib/VMCore/PassManager.cpp:1705 llvm::PassManagerImpl::run()
          #11 0x1bc5878 .../llvm/lib/VMCore/PassManager.cpp:1740 llvm::PassManager::run()
          #12 0xc3954d .../llvm/tools/llc/llc.cpp:378 compileModule()
          #13 0xc38001 .../llvm/tools/llc/llc.cpp:194 main
          #14 0x7fd557d6a11c __libc_start_main
      
      llvm-svn: 169668
      1d94e932
    • Bill Wendling's avatar
      Add the `lto_codegen_set_export_dynamic' function. · 65a6ee11
      Bill Wendling authored
      This function sets the `_exportDynamic' ivar. When that's set, we export all
      symbols (e.g. we don't run the internalize pass). This is equivalent to the
      `--export-dynamic' linker flag in GNU land:
      
      --export-dynamic
        When creating a dynamically linked executable, add all symbols to the dynamic
        symbol table. The dynamic symbol table is the set of symbols which are visible
        from dynamic objects at run time. If you do not use this option, the dynamic
        symbol table will normally contain only those symbols which are referenced by
        some dynamic object mentioned in the link. If you use dlopen to load a dynamic
        object which needs to refer back to the symbols defined by the program, rather
        than some other dynamic object, then you will probably need to use this option
        when linking the program itself.
      
      The Darwin linker will support this via the `-export_dynamic' flag. We should
      modify clang to support this via the `-rdynamic' flag.
      
      llvm-svn: 169656
      65a6ee11
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