It was renamed in gcc/gas a while ago and causes all kinds of
confusion because it was named differently in llvm and clang.

llvm-svn: 157745

be non contiguous, non overlapping and sorted by the lower end.

While this is technically a backward incompatibility, every frontent currently
produces range metadata with a single interval and we don't have any pass
that merges intervals yet, so no existing bitcode files should be rejected by
this.

llvm-svn: 157741

I disabled FMA3 autodetection, since the result may differ from expected for some benchmarks.
I added tests for GodeGen and intrinsics.
I did not change llvm.fma.f32/64 - it may be done later.

llvm-svn: 157737

Carlo Alberto Ferraris.

llvm-svn: 157736

llvm-svn: 157731

CPU16RegsRegClass and CPURARegRegClass available. Add definition of mips16
jalr instruction.

Patch by Reed Kotler.

llvm-svn: 157730

llvm-svn: 157726

This code is covered by test/CodeGen/ARM/arm-modifier.ll.

llvm-svn: 157720

Switch to MCSuperRegIterator while we're there.

llvm-svn: 157717

It helps compile exotic inline asm. In the test case, normal GR32
virtual registers use up eax-edx so the final GR32_ABCD live range has
no registers left. Since all the live ranges were tiny, we had no way of
prioritizing the smaller register class.

This patch allows tiny unspillable live ranges to be evicted by tiny
unspillable live ranges from a smaller register class.

<rdar://problem/11542429>

llvm-svn: 157715

Patch by Jack Carter.

llvm-svn: 157709

Switch the canonical FMA term operand order to match both the comment I wrote and the usual LLVM convention.

llvm-svn: 157708

llvm-svn: 157707

llvm-svn: 157706

llvm-svn: 157704

It is better to address sub-registers directly by name instead of
relying on their position in the sub-register list.

llvm-svn: 157703

An empty list is not represented as a null pointer. Let TRI do its own
shortcuts.

llvm-svn: 157702

This also required making recursive simplifications until
nothing changes or a hard limit (currently 3) is hit.

With the simplification in place indvars can canonicalize
loops of the form
for (unsigned i = 0; i < a-b; ++i)
into
for (unsigned i = 0; i != a-b; ++i)
which used to fail because SCEV created a weird umax expr
for the backedge taken count.

llvm-svn: 157701

it's pointed out that R11 can be used for magic things, and doing things just for 64-bit registers is silly.  Just optimize 3 more.

llvm-svn: 157699

integer registers.  This is already supported by the fastcc convention, but it doesn't
hurt to support it in the standard conventions as well.

In cases where we can cheat at the calling convention, this allows us to avoid returning
things through memory in more cases.

llvm-svn: 157698

Patch by Jush Lu <jush.msn@gmail.com>.

llvm-svn: 157696

llvm-svn: 157685

llvm-svn: 157683

If integer overflow causes one of the terms to reach zero, that can
force the entire expression to zero.

Fixes PR12929: cast<Ty>() argument of incompatible type

llvm-svn: 157673

No functionality.

llvm-svn: 157672

llvm-svn: 157663

If-converter models predicated defs as read + write. The read should be marked as 'undef' since it may not already be live. This appeases -verify-machineinstrs.

llvm-svn: 157662

Besides adding the new insertPass function, this patch uses it to
enhance the existing -print-machineinstrs so that the MachineInstrs
after a specific pass can be printed.

Patch by Bin Zeng!

llvm-svn: 157655

 - hoist checks out of loops where SCEV is smart enough
 - add additional statistics to measure how much we loose for not supporting interprocedural and pointers loaded from memory

llvm-svn: 157649

llvm-svn: 157640

Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions.

This required light surgery on the assembler and disassembler
because the instructions use an uncommon encoding. They are
the only two instructions in x86 that use register operands
and two immediates.

llvm-svn: 157634

ranges for the instruction about to be bundled. This fixes a bug in an external
project where an assertion was triggered due to spurious 'multiple defs' within
the bundle.

Patch by Ivan Llopard. Thanks Ivan!

llvm-svn: 157632

llvm-svn: 157624

llvm-svn: 157612

llvm-svn: 157594

llvm-svn: 157592

The test case feeds the following into InstCombine's visitSelect:
%tobool8 = icmp ne i32 0, 0
%phitmp = select i1 %tobool8, i32 3, i32 0
Then instcombine replaces the right side of the switch with 0, doesn't notice
that nothing changes and tries again indefinitely.

This fixes PR12897.

llvm-svn: 157587

llvm-svn: 157586

Attribute bits above 1<<30 are now encoded correctly.  Additionally,
the encoding/decoding functionality has been hoisted to helper functions
in Attributes.h in an effort to help the encoding/decoding to stay in
sync with the Attribute bitcode definitions.

llvm-svn: 157581

llvm-svn: 157577