- Aug 15, 2011
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Devang Patel authored
There is no need to maintain a set to keep track of variables that use location expressions. In such cases, AT_location attribute's value will be a label. llvm-svn: 137659
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Devang Patel authored
llvm-svn: 137658
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Devang Patel authored
llvm-svn: 137656
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Devang Patel authored
When a variable is inlined multiple places, abstract variable keeps name, location, type etc.. info and all other concreate instances of the variable directly refers to abstract variable. llvm-svn: 137637
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Devang Patel authored
llvm-svn: 137632
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Devang Patel authored
llvm-svn: 137631
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Devang Patel authored
llvm-svn: 137621
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Devang Patel authored
llvm-svn: 137618
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- Aug 13, 2011
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Nadav Rotem authored
be illegal, even if the requested vector type is legal. Testcase is one of the disabled ARM tests in the vector-select patch. llvm-svn: 137562
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- Aug 12, 2011
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Bill Wendling authored
This implements the 'landingpad' instruction. It's used to indicate that a basic block is a landing pad. There are several restrictions on its use (see LangRef.html for more detail). These restrictions allow the exception handling code to gather the information it needs in a much more sane way. This patch has the definition, implementation, C interface, parsing, and bitcode support in it. llvm-svn: 137501
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Devang Patel authored
llvm-svn: 137485
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Chris Lattner authored
llvm-svn: 137480
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Devang Patel authored
llvm-svn: 137478
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Nadav Rotem authored
llvm-svn: 137466
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Duncan Sands authored
when building with assertions disabled. llvm-svn: 137460
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Jakob Stoklund Olesen authored
This is possible now that we now longer provide an interface to iterate the interference overlaps. llvm-svn: 137397
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Jakob Stoklund Olesen authored
llvm-svn: 137381
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Jakob Stoklund Olesen authored
The Query class now holds two iterators instead of an InterferenceResult instance. The iterators are used as bookmarks for repeated collectInterferingVRegs calls. llvm-svn: 137380
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- Aug 11, 2011
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Jakob Stoklund Olesen authored
collectInterferingVRegs will be the primary function for interference checks. llvm-svn: 137354
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Jakob Stoklund Olesen authored
No clients are iterating over interference overlaps. llvm-svn: 137350
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Jakob Stoklund Olesen authored
The InterferenceResult iterator turned out to be less important than we thought it would be. LiveIntervalUnion clients want higher level information, like the list of interfering virtual registers. llvm-svn: 137346
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Benjamin Kramer authored
llvm-svn: 137321
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Nadav Rotem authored
lower XMM register gets in first. This will allow the SUBREG pattern to elliminate the first vector insertion. llvm-svn: 137310
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rdar://9930964Chris Lattner authored
It's somewhat surprising anything works without this. Before we would compile the testcase into: test: # @test movl $4, 8(%rdi) movl 8(%rdi), %eax orl %esi, %eax cmpl $32, %edx movl %eax, -4(%rsp) # 4-byte Spill je .LBB0_2 now we produce: test: # @test movl 8(%rdi), %eax movl $4, 8(%rdi) orl %esi, %eax cmpl $32, %edx movl %eax, -4(%rsp) # 4-byte Spill je .LBB0_2 llvm-svn: 137303
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Devang Patel authored
llvm-svn: 137283
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- Aug 10, 2011
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Devang Patel authored
Distinguish between two copies of one inlined variable. Take 2. llvm-svn: 137253
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Devang Patel authored
While extending definition range of a debug variable, consult lexical scopes also. There is no point extending debug variable out side its lexical block. This provides 6x compile time speedup in some cases. llvm-svn: 137250
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Devang Patel authored
llvm-svn: 137249
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Devang Patel authored
llvm-svn: 137246
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Devang Patel authored
llvm-svn: 137237
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Jakob Stoklund Olesen authored
llvm-svn: 137184
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- Aug 09, 2011
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Jakob Stoklund Olesen authored
Coalescing can remove copy-like instructions with sub-register operands that constrained the register class. Examples are: x86: GR32_ABCD:sub_8bit_hi -> GR32 arm: DPR_VFP2:ssub0 -> DPR Recompute the register class of any virtual registers that are used by less instructions after coalescing. This affects code generation for the Cortex-A8 where we use NEON instructions for f32 operations, c.f. fp_convert.ll: vadd.f32 d16, d1, d0 vcvt.s32.f32 d0, d16 The register allocator is now free to use d16 for the temporary, and that comes first in the allocation order because it doesn't interfere with any s-registers. llvm-svn: 137133
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Jakob Stoklund Olesen authored
This function doesn't have anything to do with spill weights, and MRI already has functions for manipulating the register class of a virtual register. llvm-svn: 137123
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Devang Patel authored
llvm-svn: 137096
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Jakob Stoklund Olesen authored
No functional change. llvm-svn: 137094
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Jakob Stoklund Olesen authored
RegisterCoalescer.h still has the CoalescerPair class interface. llvm-svn: 137088
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Jakob Stoklund Olesen authored
A public interface is no longer needed since RegisterCoalescer is not an analysis any more. llvm-svn: 137082
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- Aug 08, 2011
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Jakob Stoklund Olesen authored
These the methods are target-independent since they simply scan the memory operands. They can live in TargetInstrInfoImpl. llvm-svn: 137063
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Devang Patel authored
llvm-svn: 137056
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- Aug 06, 2011
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Jakob Stoklund Olesen authored
llvm-svn: 137023
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