OK, not really. We don't want to reintroduce the old rewriter hacks.

This patch extracts virtual register rewriting as a separate pass that
runs after the register allocator. This is possible now that
CodeGen/Passes.cpp can configure the full optimizing register allocator
pipeline.

The rewriter pass uses register assignments in VirtRegMap to rewrite
virtual registers to physical registers, and it inserts kill flags based
on live intervals.

These finalization steps are the same for the optimizing register
allocators: RABasic, RAGreedy, and PBQP.

llvm-svn: 158244

llvm-svn: 158234

llvm-svn: 158233

Bulk move of TargetInstrInfo implementation into
TargetInstrInfoImpl. This is dirty because the code isn't part of
TargetInstrInfoImpl class, nor should it be, because the methods are
not target hooks. However, it's the current mechanism for keeping
libTarget useful outside the backend. You'll get a not-so-nice link
error if you invoke a TargetInstrInfo method that depends on CodeGen.

The TargetInstrInfoImpl class should probably be removed since it
doesn't really solve this problem.

To really fix this, we probably need separate interfaces for the
CodeGen/nonCodeGen sides of TargetInstrInfo.

llvm-svn: 158212

Move terminator machine verification to check MachineBasicBlock::instr_iterator instead of MBB::iterator

llvm-svn: 158154

The commit is intended to fix rdar://11540023.
It is implemented as part of peephole optimization. We can actually implement
this in the SelectionDAG lowering phase.

llvm-svn: 158122

Bundles should be treated as one atomic transaction when checking
liveness. That is how the register allocator (and VLIW targets) treats
bundles.

llvm-svn: 158116

Allow targets to access this API. It's required for RegisterPressure.

llvm-svn: 158102

Make it a general utility for use by Targets.

llvm-svn: 158097

LLVM is now -Wunused-private-field clean except for
- lib/MC/MCDisassembler/Disassembler.h. Not sure why it keeps all those unaccessible fields.
- gtest.

llvm-svn: 158096

There are some that I didn't remove this round because they looked like
obvious stubs. There are dead variables in gtest too, they should be
fixed upstream.

llvm-svn: 158090

Remat has been stable for years, and it isn't done by
LiveIntervalAnalysis any longer. (See LiveRangeEdit).

llvm-svn: 158079

llvm-svn: 158069

It is useful outside RegAllocBase.

llvm-svn: 158041

Soon we'll be making LiveIntervalUnions for register units as well.

This was the only place using the RepReg member, so just remove it.

llvm-svn: 158038

llvm-svn: 158037

Don't print out the register number and spill weight, making the TRI
argument unnecessary.

This allows callers to interpret the reg field. It can currently be a
virtual register, a physical register, a spill slot, or a register unit.

llvm-svn: 158031

Instead of computing a live interval per physreg, LiveIntervals can
compute live intervals per register unit. This makes impossible the
confusing situation where aliasing registers could have overlapping live
intervals. It should also make fixed interferernce checking cheaper
since registers have fewer register units than aliases.

Live intervals for regunits are computed on demand, using MRI use-def
chains and the new LiveRangeCalc class. Only regunits live in to ABI
blocks are precomputed during LiveIntervals::runOnMachineFunction().

The regunit liveness computations don't depend on LiveVariables.

llvm-svn: 158029

These LiveRangeCalc methods are to be used when computing a live range
from scratch.

llvm-svn: 158027

Patch by Ivan Llopard.

llvm-svn: 158025

Minimum latency determines per-cycle scheduling groups.
Expected latency determines critical path and cost.

llvm-svn: 158021

expression (a * b + c) that can be implemented as a fused multiply-add (fma)
if the target determines that this will be more efficient. This intrinsic
will be used to implement FP_CONTRACT support and an aggressive FMA formation
mode.

If your target has a fast FMA instruction you should override the
isFMAFasterThanMulAndAdd method in TargetLowering to return true.

llvm-svn: 158014

This allows a subtarget to explicitly specify the issue width and
other properties without providing pipeline stage details for every
instruction.

llvm-svn: 157979

Use ILP heuristics for long latency instrs if no scoreboard exists.

llvm-svn: 157978

valid itinerary but no pipeline stages.

An itinerary can contain useful scheduling information without specifying pipeline stages for each instruction.

llvm-svn: 157977

llvm-svn: 157975

Rematerialization is handled by LiveRangeEdit now.

llvm-svn: 157974

It is an old function that does a lot more than required by
CalcSpillWeights, which was the only remaining caller.

The isRematerializable() function never actually sets the isLoad
argument, so don't try to compute that.

llvm-svn: 157973

llvm-svn: 157963

No functional change.

llvm-svn: 157957

Remove the same pointers from all the other LiveRangeCalc functions,
simplifying the interface.

llvm-svn: 157941

llvm-svn: 157925

llvm-svn: 157885

IntRange converted from struct to class. So main change everywhere is replacement of ".Low/High" with ".getLow/getHigh()"

llvm-svn: 157884

IntegersSubsetGeneric, IntegersSubsetMapping: added IntTy template parameter, that allows use either APInt or IntItem. This change allows to write unittest for these classes.

llvm-svn: 157880

Check that the SDValue TargetLowering::LowerOperation returns is not null
before replacing the original node with the returned node.

llvm-svn: 157873

No functional change intended.

Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.

This makes it possible to do so without changing all clients (again).

llvm-svn: 157854

After physreg coalescing was disabled, these functions can't do anything
useful with physregs anyway.

llvm-svn: 157849

MCRegAliasIterator can include Reg itself in the list.

llvm-svn: 157848

MCRegAliasIterator can optionally visit the register itself, allowing
for simpler code.

llvm-svn: 157837