The tool reports verbose output for the DWARF debug location coverage.
The llvm-locstats for each variable or formal parameter DIE computes what
percentage from the code section bytes, where it is in scope, it has
location description. The line 0 shows the number (and the percentage) of
DIEs with no location information, but the line 100 shows the number (and
the percentage) of DIEs where there is location information in all code
section bytes (where the variable or parameter is in the scope). The line
50..59 shows the number (and the percentage) of DIEs where the location
information is in between 50 and 59 percentage of its scope covered.

Differential Revision: https://reviews.llvm.org/D66526

llvm-svn: 373183

SystemZPostRewrite needs to be run before (it may emit COPYs) the Post-RA
pseudo pass also at -O0, so it should be added in addPostRegAlloc().

Review: Ulrich Weigand
llvm-svn: 373182

These are all also implemented in avx512_logical_lowering_types
with support for masking.

llvm-svn: 373181

llvm-svn: 373180

llvm-svn: 373179

llvm-svn: 373178

[X86] Split v16i32/v8i64 bitreverse on avx512f targets without avx512bw to enable the use of vpshufb on the 256-bit halves.

llvm-svn: 373177

Summary:

Reviewers:
t.p.northover

Subscribers:

Differential Revision: https://reviews.llvm.org/D46378

llvm-svn: 373176

llvm-svn: 373175

This was added back to allow some performance regressions to be
investigated. The main perf issue was fixed shortly after adding
this back and no other major issues have been reported. So I
think its safe to remove this again.

llvm-svn: 373174

value-dependent initializer.

llvm-svn: 373173

There's room from improvement here, but this is a decent
starting point.

There are a few minor regressions in the vector-rotate tests,
where we are now forming a vpternlog from an and before we get
a chance to form it for a bitselect that we were matching
previously. This results in an AND and an ANDN feeding the
vpternlog where previously we just had an AND after the
vpternlog. I think we can probably DAG combine the AND with
the bitselect to get back to similar codegen.

llvm-svn: 373172

llvm-svn: 373171

MergeFunctions and DCE pass are missing from OCaml/C-api. This patch
adds them.

Differential Revision: https://reviews.llvm.org/D65071

Reviewers: whitequark, hiraditya, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits

Tags: #llvm

Authored by: kren1

llvm-svn: 373170

Moves existing article links on the Programming, Subsystem, and Reference documentation pages to new locations. Also moves Github Repository and Publications links to the sidebar.

llvm-svn: 373169

For the following two cases, we currently suppress the symbols. This
patch emits them (compatible with GNU as).

* `test2_a = undef`: if `undef` is otherwise unused.
* `.hidden hidden`: if `hidden` is unused. This is the main point of the
  patch, because omitting the symbol would cause a linker semantic
  difference.

It causes a behavior change that is not compatible with GNU as:

.weakref foo1, bar1

When neither foo1 nor bar1 is used, we now emit bar1, which is arguably
more consistent.

Another change is that we will emit .TOC. for .TOC.@tocbase .  For this
directive, suppressing .TOC. can be seen as a size optimization, but we
choose to drop it for simplicity and consistency.

llvm-svn: 373168

[DivRemPairs] Don't assert that we won't ever get expanded-form rem pairs in different BB's (PR43500)

If we happen to have the same div in two basic blocks,
and in one of those we also happen to have the rem part,
we'd match the div-rem pair, but the wrong ones.
So let's drop overly-ambiguous assert.

Fixes https://bugs.llvm.org/show_bug.cgi?id=43500

llvm-svn: 373167

[SLP] Fix for PR31847: Assertion failed: (isLoopInvariant(Operands[i], L) && "SCEVAddRecExpr operand is not loop-invariant!")

Initially SLP vectorizer replaced all going-to-be-vectorized
instructions with Undef values. It may break ScalarEvaluation and may
cause a crash.
Reworked SLP vectorizer so that it does not replace vectorized
instructions by UndefValue anymore. Instead vectorized instructions are
marked for deletion inside if BoUpSLP class and deleted upon class
destruction.

Reviewers: mzolotukhin, mkuper, hfinkel, RKSimon, davide, spatel

Subscribers: RKSimon, Gerolf, anemet, hans, majnemer, llvm-commits, sanjoy

Differential Revision: https://reviews.llvm.org/D29641

llvm-svn: 373166

Summary:
The following code

```
struct f {
  template <class T>
  void bar() && noexcept {}
};
```

will be formatted to the following with LLVM style, and
`AlwaysBreakTemplateDeclarations: Yes`

```
struct f {
  template <class T>
      void bar() && noexcept {}
};
```

The indentation of the `void bar()` line is wrong.

Reviewers: klimek, owenpan, krasimir, timwoj, MyDeveloperDay

Reviewed By: klimek, MyDeveloperDay

Subscribers: MyDeveloperDay, ilya-biryukov, llvm-commits, cfe-commits

Patch By: AndWass

Tags: #clang-format, #clang, #llvm

Differential Revision: https://reviews.llvm.org/D68072

llvm-svn: 373165

Summary:
g++ build emits warning:

llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:667:77: error: suggest parentheses around ?&&? within ?||? [-Werror=parentheses]
     assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress() &&
                                                         ~~~~~~~~~~~~~~~~~~~~^~
            "Unexpected operand type for LWZtoc pseudo.");

I believe the intension is to assert all different types,
so we should add a parentheses to include all '||'.

Reviewers: #powerpc, sfertile, hubert.reinterpretcast, Xiangling_L

Reviewed By: Xiangling_L

Subscribers: wuzish, nemanjai, hiraditya, kbarton, MaskRay, shchenz, steven.zhang, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68180

llvm-svn: 373164

This is an attempt to fill in some of the missing instructions from the
Cortex-M4 schedule, and make it easier to do the same for other ARM cpus.

- Some instructions are marked as hasNoSchedulingInfo as they are pseudos or
  otherwise do not require scheduling info
- A lot of features have been marked not supported
- Some WriteRes's have been added for cvt instructions.
- Some extra instruction latencies have been added, notably by relaxing the
  regex for dsp instruction to catch more cases, and some fp instructions.

This goes a long way to get the CompleteModel working for this CPU. It does not
go far enough as to get all scheduling info for all output operands correct.

Differential Revision: https://reviews.llvm.org/D67957

llvm-svn: 373163

llvm-svn: 373162

constexpr) destructors from being used in the values of constexpr
variables.

The standard rules here are unclear at best, so rejecting the
problematic cases seems prudent. Prior to this change, we would fail to
run the destructors for these temporaries, even if they had
side-effects, which is certainly not the right behavior.

llvm-svn: 373161

In the presence of mutable state, we need to check whether temporaries
involved in a constant expression have permissible values at the end of
the overall evaluation, rather than at the end of the evaluation of the
initializer of the temporary.

llvm-svn: 373160

has a constexpr destructor.

For constexpr variables, reject if the variable does not have constant
destruction. In all cases, do not emit runtime calls to the destructor
for variables with constant destruction.

llvm-svn: 373159

Adds sections for Command Line and Libfuzzer articles on Programming Documentation page.

llvm-svn: 373158

llvm-svn: 373157

This allows us to reduce the use count on the condition node before
the match. This enables load folding for that operand without
relying on the peephole pass. This will be improved on for
broadcast load folding in a subsequent commit.

This still requires a bunch of isel patterns for vXi16/vXi8 types
though.

llvm-svn: 373156

llvm-svn: 373155

This uses a similar isel pattern as we used for vpcmov with XOP.

llvm-svn: 373154

/proc unless Linux layer compatibility is activated for CentOS is activated is not present
thus relying on a more native for checking the address.

Reviewers: Hahnfeld, kongyl, jdoerfert, jlpeyton, AndreyChurbanov, emaster, dim

Reviewed By: Hahnfeld

Differential Revision: https://reviews.llvm.org/D67326

llvm-svn: 373152

Summary:  This is to facilitate unittests

Reviewers: compnerd, vsk, tejohnson, sebpop, brzycki, SirishP

Reviewed By: tejohnson

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68079

llvm-svn: 373151

The static analyzer is warning about potential null dereferences, but in these cases we should be able to use castAs<> directly and if not assert will fire for us.

llvm-svn: 373150

The fma mutate test will not exercise what it was intended to test
once we simplify those ops immediately, but the test will still
pass with the existing CHECKs, so I'm leaving it in case that
still has minimal value.

llvm-svn: 373149

Summary: Fixes PR43430.

Reviewers: hintonda, NoQ, Szelethus, lebedev.ri

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D68172

llvm-svn: 373148

When testing clang that has been compiled with `-DDEFAULT_SYSROOT` set to some path,
some tests would fail. Override sysroot to be empty string for the tests to succeed
when clang is configured with `DEFAULT_SYSROOT`.

Differential Revision: https://reviews.llvm.org/D66834

Patch by Sergej Jaskiewicz <jaskiewiczs@icloud.com>.

llvm-svn: 373147

This reverts SVN r373144, as it changed the demangled output a little, see
http://lab.llvm.org:8011/builders/lldb-x64-windows-ninja/builds/9306.

llvm-svn: 373146

This was requested in https://reviews.llvm.org/D68014, but I forgot
to add it before pushing the commit.

llvm-svn: 373145

If there's any testcases that only do demangling (I didn't find any),
they could be made available for all platforms now.

Differential Revision: https://reviews.llvm.org/D68134

llvm-svn: 373144

We should be disabling inline for minsize, not optsize.

llvm-svn: 373143