- Feb 10, 2018
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Justin Bogner authored
Introduces the LLVM_CCACHE_PARAMS cmake variable, which can be used to pass arbitrary parameters to ccache invocations. llvm-svn: 324779
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Dan Gohman authored
This adds a wasm-import-module function attribute and a .import_module assembler directive, for specifying module import names for WebAssembly. Currently these may only be used for function symbols; global variables may be considered in the future. WebAssembly has a two-level namespace scheme for symbols, and it's normally the linker's job to assign the module name, which is the first-level name. The attributes here allow users to specify their own module names explicitly, which is useful for tools generating bindings to modules defined in other languages. This feature is not fully usable yet. It will evolve along with the ongoing symbol table and lld changes. Differential Revision: https://reviews.llvm.org/D42520 llvm-svn: 324778
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- Feb 09, 2018
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Dan Gohman authored
llvm-svn: 324777
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Daniel Neilson authored
Summary: This change is part of step five in the series of changes to remove alignment argument from memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the AMDGPUPromoteAlloca pass to cease using: 1) The old getAlignment() API of MemoryIntrinsic in favour of getting source & dest specific alignments through the new API. 2) The old IRBuilder createMemCpy/createMemMove single-alignment APIs in favour of the new API that allows setting source and destination alignments independently. Steps: Step 1) Remove alignment parameter and create alignment parameter attributes for memcpy/memmove/memset. ( rL322965, rC322964, rL322963 ) Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing source and dest alignments. ( rL323597 ) Step 3) Update Clang to use the new IRBuilder API. ( rC323617 ) Step 4) Update Polly to use the new IRBuilder API. ( rL323618 ) Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API, and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment() and [get|set]SourceAlignment() instead. ( rL323886, r323891, rL324148, rL324273, rL324278, rL324384, rL324395, rL324402, rL324626, rL324642, rL324653, rL324654, rL324773 ) Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the MemIntrinsicInst::[get|set]Alignment() methods. Reference http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html llvm-svn: 324774
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Daniel Neilson authored
Summary: This change is part of step five in the series of changes to remove alignment argument from memcpy/memmove/memset in favour of alignment attributes. In particular, this changes AArch64FastISel to cease using the old getAlignment() API of MemoryIntrinsic in favour of getting source & dest specific alignments through the new API. Steps: Step 1) Remove alignment parameter and create alignment parameter attributes for memcpy/memmove/memset. ( rL322965, rC322964, rL322963 ) Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing source and dest alignments. ( rL323597 ) Step 3) Update Clang to use the new IRBuilder API. ( rC323617 ) Step 4) Update Polly to use the new IRBuilder API. ( rL323618 ) Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API, and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment() and [get|set]SourceAlignment() instead. ( rL323886, r323891, rL324148, rL324273, rL324278, rL324384, rL324395, rL324402, rL324626, rL324642, rL324653, rL324654 ) Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the MemIntrinsicInst::[get|set]Alignment() methods. Reference http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html llvm-svn: 324773
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Francis Visoiu Mistrih authored
In the rare case where the input contains rip-relative addressing with immediate displacements, *and* the instruction ends with an immediate, we encode the instruction in the wrong way: movl $12345678, 0x400(%rdi) // all good, no rip-relative addr movl %eax, 0x400(%rip) // all good, no immediate at the end of the instruction movl $12345678, 0x400(%rip) // fails, encodes address as 0x3fc(%rip) Offset is a label: movl $12345678, foo(%rip) we want to account for the size of the immediate (in this case, $12345678, 4 bytes). Offset is an immediate: movl $12345678, 0x400(%rip) we should not account for the size of the immediate, assuming the immediate offset is what the user wanted. Differential Revision: https://reviews.llvm.org/D43050 llvm-svn: 324772
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Matt Davis authored
Summary: Since the lifetime markers are metadata instructions, they should probably be treated as such by the isMetaInstruction predicate. There was no issue that provoked this change, I just ran across it while investigating another issue. Reviewers: aprantl, MatzeB Reviewed By: aprantl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D43111 llvm-svn: 324771
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Sam Clegg authored
Peviously we were reporting undefined symbol as being defined by the IMPORT sections. This change reports undefined symbols in the same that other formats do, and also removes the need to store the section with each symbol (since it can be derived from the symbol type). Differential Revision: https://reviews.llvm.org/D43101 llvm-svn: 324770
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Francis Visoiu Mistrih authored
Make -debug MBB headers more copy-pastable into mir files. llvm-svn: 324769
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Kevin Enderby authored
from the value stored in swift_version bits in the flags field in the objc_image_info struct. ABI version 3 thru 6 were previously added but this code was not updated to print the Swift version. rdar://35624067 llvm-svn: 324767
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Evandro Menezes authored
Fix the modeling of transfers between a generic register and a partial ASIMD one. llvm-svn: 324766
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Vedant Kumar authored
Extend salvageDebugInfo to preserve the debug info from a dead 'or' with a constant. Patch by Ismail Badawi! Differential Revision: https://reviews.llvm.org/D43129 llvm-svn: 324764
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Krzysztof Parzyszek authored
Fixes http://llvm.org/PR36320. llvm-svn: 324763
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Matt Arsenault authored
Before it was declared at a struct, which differs from DominatorTree. Make it a class so both can be declared the same way without hitting the warning about mismatched struct vs. class declarations. llvm-svn: 324760
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Artem Belevich authored
* !foreach on lists didn't evaluate operands of the RHS operator. This made nested operators silently fail. * A typo in the code could result in a wrong value substituted for an operation which produced a false '!foreach requires an operator' error. * Keep recursion over the DAG within ForeachHelper. This simplifies things a bit as we no longer need to pass the Type around in order to prevent recursion. Differential Revision: https://reviews.llvm.org/D43083 llvm-svn: 324758
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Steven Wu authored
Summary: For symbols that has linkonce_odr linkage and unnamed_addr, it can be auto hide by linker to avoid weak external symbols. Teach ThinLTO to perform auto hide so it can safely promote linkonce_odr to weak symbols without breaking this nice property. Reviewers: tejohnson, mehdi_amini Reviewed By: tejohnson Subscribers: inglorion, eraman, rnk, pcc, llvm-commits Differential Revision: https://reviews.llvm.org/D43130 llvm-svn: 324757
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Sanjay Patel authored
These are incomplete and were made redundant with the consolidation in: https://reviews.llvm.org/rL324678 llvm-svn: 324754
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Simon Pilgrim authored
This doesn't cover everything in InstCombiner.visitXor yet, but increases coverage for a lot of tests llvm-svn: 324753
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Matt Arsenault authored
llvm-svn: 324751
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Rafael Espindola authored
* Use uleb128 for code offsets in the LSDA call site table. * Omit the TTBase offset if the type table is empty. This change can reduce the size of the DWARF/Itanium LSDA by about half. Patch by Ryan Prichard! llvm-svn: 324750
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Rafael Espindola authored
Rely on the assembler to finalize the layout of the DWARF/Itanium exception-handling LSDA. Rather than calculate the exact size of each thing in the LSDA, use assembler directives: To emit the offset to the TTBase label: .uleb128 .Lttbase0-.Lttbaseref0 .Lttbaseref0: To emit the size of the call site table: .uleb128 .Lcst_end0-.Lcst_begin0 .Lcst_begin0: ... call site table entries ... .Lcst_end0: To align the type info table: ... action table ... .balign 4 .long _ZTIi .long _ZTIl .Lttbase0: Using assembler directives simplifies the compiler and allows switching the encoding of offsets in the call site table from udata4 to uleb128 for a large code size savings. (This commit does not change the encoding.) The combination of the uleb128 followed by a balign creates an unfortunate dependency cycle that the assembler must sometimes resolve either by padding an LEB or by inserting zero padding before the type table. See PR35809 or GNU as bug 4029. Patch by Ryan Prichard! llvm-svn: 324749
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Matt Arsenault authored
This reverts r324494 and reapplies r324487. llvm-svn: 324747
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Matt Arsenault authored
Move utility function that depends on codegen. Fixes build with r324487 reapplied. llvm-svn: 324746
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Evandro Menezes authored
Make stand alone methods in AArch64InstrInfo static. llvm-svn: 324745
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David Blaikie authored
llvm-svn: 324740
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David Blaikie authored
llvm-svn: 324738
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Krzysztof Parzyszek authored
Additionally, simplify the rest of the argument/parameter lowering code. llvm-svn: 324737
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Stefan Maksimovic authored
r314974 introduced insertion of DEBUG_VALUEs after each redefinition of debug value register in the slot index range. In case the instruction redefining the debug value register was a terminator, machine verifier would complain since it enforces the rule of no non-terminator instructions following the first terminator. Differential Revision: https://reviews.llvm.org/D42801 llvm-svn: 324734
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Stefan Maksimovic authored
When adding operands to machine instructions in case of RegisterSDNodes, generate a COPY node in case the register class does not match the one in the instruction definition. Differental Revision: https://reviews.llvm.org/D35561 llvm-svn: 324733
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Oliver Stannard authored
The llvm assembly parser and gas both accept "@notype" in the .type assembly directive, but we were printing it as "@no_type", which isn't accepted by either assembler. Differential revision: https://reviews.llvm.org/D43116 llvm-svn: 324731
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Simon Dardis authored
Repurpose this previously XFAIL'd test to check that jalr uses $25 as per ABI requirements for PIC code. llvm-svn: 324729
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Simon Pilgrim authored
llvm-svn: 324728
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Clement Courbet authored
Increment was using the wrong NumUnits (the one from the ProcResGroup and not the subunit). llvm-svn: 324727
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Pavel Labath authored
Summary: The class contained arrays of two structures (DataArray and HashData). These structures were in 1:1 correspondence, and one of them contained pointers to the other (and *both* contained a "Name" field). By merging these two structures into one, we can save a bit of space without negatively impacting much of anything. Reviewers: JDevlieghere, aprantl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D43073 llvm-svn: 324724
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Jonas Paulsson authored
Enable multiple COPY hints to eliminate more COPYs during register allocation. Note that this is something all targets should do, see https://reviews.llvm.org/D38128. Review: Martin Storsjö llvm-svn: 324720
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Serguei Katkov authored
Rename getLatchPredicateForGuard to more common name getFlippedStrictnessPredicate and move it to ICmpInst class. llvm-svn: 324717
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Vedant Kumar authored
Bugpoint will keep going even if the opt binary it's given doesn't exist. It should at least alert the user, so it's clear why reductions are failing. llvm-svn: 324713
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Stanislav Mekhanoshin authored
NFC. Differential Revision: https://reviews.llvm.org/D43054 llvm-svn: 324712
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Peter Collingbourne authored
As of r323633, this bit started controlling whether symbol definitions appear in object files, and it also became sensitive to the prevailing bit, so it needs to be included in the key. Differential Revision: https://reviews.llvm.org/D43109 llvm-svn: 324711
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Craig Topper authored
Previously we extracted two subvectors and concatenate. But the concatenate will be lowered to two insert subvectors. Then DAG combine will merge once of the inserts and one of the extracts back into the original vector. We might as well just directly use one extract and one insert. llvm-svn: 324710
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