- Aug 02, 2016
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Albert Gutowski authored
llvm-svn: 277503
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Michael Zolotukhin authored
llvm-svn: 277502
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Nirav Dave authored
Attempt 2: Retryign after Tsan.mman test fix. Attempt 1: Recommitting after fixing test. When parsing assembly where the line comment syntax is not hash, the lexer cannot distinguish between hash's that start a hash line comment and one that is part of an assembly statement and must be distinguished during parsing. Previously, this was incompletely handled by not checking for EndOfStatement at the end of statements and interpreting hash prefixed statements as comments. Change EndOfStatement Parsing to check for Hash comments and reintroduce Hash statement parsing to catch previously handled cases. Reviewers: rnk, majnemer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23017 llvm-svn: 277501
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Nicolai Haehnle authored
Summary: There are cases where uniform branch conditions are computed in VGPRs, and we didn't correctly mark those as WQM. The stray change in basic-branch.ll is because invoking the LiveIntervals analysis leads to the detection of a dead register that would otherwise not be seen at -O0. This is a candidate for the 3.9 branch, as it fixes a possible hang. Reviewers: arsenm, tstellarAMD, mareko Subscribers: arsenm, llvm-commits, kzhuravl Differential Revision: https://reviews.llvm.org/D22673 llvm-svn: 277500
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Ahmed Bougacha authored
I forgot the REQUIRES once (see r277486). Let's prevent it from happening again. llvm-svn: 277499
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Ahmed Bougacha authored
llvm-svn: 277498
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Krzysztof Parzyszek authored
Identify patterns where the address is aligned to an 8-byte boundary, but both the base address and the constant offset are both proper multiples of 4. In such cases, extract Base+4 into a separate instruc- tion, and use S2_storerd_io, instead of using S4_storerd_rr. llvm-svn: 277497
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Krzysztof Parzyszek authored
llvm-svn: 277496
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Hubert Tong authored
llvm-svn: 277495
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Krzysztof Parzyszek authored
- Implement getOptimalMemOpType. - Check BaseOffset in isLegalAddressingMode. llvm-svn: 277494
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Chris Bieneman authored
This reverts commit r277487. Removing the probe predicate was a red herring. It results in more symbols being placed in the final order file, but they are symbols from outside the clang image. llvm-svn: 277492
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Kirill Bobyrev authored
llvm-svn: 277491
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Nirav Dave authored
Update clang tests in light of r277489. llvm-svn: 277490
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Nirav Dave authored
Recommitting after fixing overaggressive fastpath return in parsing. Fix intel syntax special case identifier operands that refer to a constant (e.g. .set <ID> n) to be interpreted as immediate not memory in parsing. Associated commit to fix clang test commited shortly. Reviewers: rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D22585 llvm-svn: 277489
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Vitaly Buka authored
Reviewers: kcc, eugenis Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D22992 llvm-svn: 277488
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Chris Bieneman authored
Having the dtrace predicate setup to only show probes in clang filters out static initializers executed by dyld, which we do want included in the order files. llvm-svn: 277487
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Ahmed Bougacha authored
I thought the directory had a lit.local.cfg, but it doesn't. I'll add one, but for now, add the REQUIRES line. While there, move the triple into the IR and add a datalayout. llvm-svn: 277486
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Daniel Berlin authored
and leave a FIXME. llvm-svn: 277485
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Ahmed Bougacha authored
None of GlobalISel requires the property, but this lets us use the verifier instead of rolling our own "all instructions selected" check. llvm-svn: 277484
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Ahmed Bougacha authored
After instruction selection, there should be no pre-isel generic instructions remaining, nor should generic virtual registers be used. Verify that. llvm-svn: 277483
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Ahmed Bougacha authored
Selected: the InstructionSelect pass ran and all pre-isel generic instructions have been eliminated; i.e., all instructions are now target-specific or non-pre-isel generic instructions (e.g., COPY). Since only pre-isel generic instructions can have generic virtual register operands, this also means that all generic virtual registers have been constrained to virtual registers (assigned to register classes) and that all sizes attached to them have been eliminated. This lets us enforce certain invariants across passes. This property is GlobalISel-specific, but is always available. llvm-svn: 277482
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Daniel Berlin authored
Fixes PR28670 Summary: Rewrite the use optimizer to be less memory intensive and 50% faster. Fixes PR28670 The new use optimizer works like a standard SSA renaming pass, storing all possible versions a MemorySSA use could get in a stack, and just tracking indexes into the stack. This uses much less memory than caching N^2 alias query results. It's also a lot faster. The current version defers phi node walking to the normal walker. Reviewers: george.burgess.iv Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23032 llvm-svn: 277480
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Artur Pilipenko authored
This is a preparatory refactoring to support conditions other than ICmpInst. llvm-svn: 277479
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Reid Kleckner authored
Summary: On Windows 10, this gets called after TLS has been torn down from NTDLL, and we crash attempting to return fake_tsd. This interceptor isn't needed after r242948 anyway, so let's remove it. The ASan runtime can now tolerate unregistered threads calling __asan_handle_no_return. Reviewers: vitalybuka, etienneb Subscribers: kubabrecka, llvm-commits Differential Revision: https://reviews.llvm.org/D23044 llvm-svn: 277478
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Ahmed Bougacha authored
The InstructionSelect pass assumes that RegBankSelect ran; set the property on all tests (thereby verifying the test inputs) and require it in the pass. llvm-svn: 277477
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Ahmed Bougacha authored
RegBankSelected functions shouldn't have any generic virtual register not assigned to a bank. Verify that. llvm-svn: 277476
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Ahmed Bougacha authored
RegBankSelected: the RegBankSelect pass ran and all generic virtual registers have been assigned to a register bank. This lets us enforce certain invariants across passes. This property is GlobalISel-specific, but is always available. llvm-svn: 277475
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Matthew Simpson authored
This patch enables the vectorizer to generate both scalar and vector versions of an integer induction variable for a given loop. Previously, we only generated a scalar induction variable if we knew all its users were going to be scalar. Otherwise, we generated a vector induction variable. In the case of a loop with both scalar and vector users of the induction variable, we would generate the vector induction variable and extract scalar values from it for the scalar users. With this patch, we now generate both versions of the induction variable when there are both scalar and vector users and select which version to use based on whether the user is scalar or vector. Differential Revision: https://reviews.llvm.org/D22869 llvm-svn: 277474
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Artem Dergachev authored
If a target triple is not specified, the default host triple is used, which is not good for compiling inline assembler code. Patch by Raphael Isemann! llvm-svn: 277473
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Ahmed Bougacha authored
RegBankSelect and InstructionSelect run after the legalizer and require a Legalized function: check that all instructions are legal. Note that this should be in the MachineVerifier, but it can't use the MachineLegalizer as it's currently in the separate GlobalISel library. Note that the RegBankSelect verifier checks have the same layering problem, but we only use inline methods so end up not needing to link against the GlobalISel library. llvm-svn: 277472
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Ahmed Bougacha authored
We currently use and test these, and select most of them. Mark them as legal even though we don't go through the full ir->asm flow yet. This doesn't currently have standalone tests, but the verifier will soon learn to check that the regbankselect/select tests are legal. llvm-svn: 277471
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Ahmed Bougacha authored
Legalized: The MachineLegalizer ran; all pre-isel generic instructions have been legalized, i.e., all instructions are now one of: - generic and always legal (e.g., COPY) - target-specific - legal pre-isel generic instructions. This lets us enforce certain invariants across passes. This property is GlobalISel-specific, but is always available. llvm-svn: 277470
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Kirill Bobyrev authored
Clang-rename Emacs integration script sometimes doesn't work correctly. llvm-svn: 277469
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Nirav Dave authored
Causes TSan failure on PPC64 This reverts commit r277459. llvm-svn: 277468
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Dan Gohman authored
llvm-svn: 277467
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Artur Pilipenko authored
llvm-svn: 277466
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Ahmed Bougacha authored
This is only used for debug prints, but the previous hardcoded ", " caused it to be printed unnecessarily when OnlySet, and is annoying when adding new properties. llvm-svn: 277465
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Ahmed Bougacha authored
The GISel passes don't make sense on non-SSA functions. All GISel tests already set isSSA. Enforce that. llvm-svn: 277464
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Kuba Brecka authored
llvm-svn: 277463
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Kuba Brecka authored
The system implementation of OSAtomicTestAndClear returns the original bit, but the TSan interceptor has a bug which always returns zero from the function. This patch fixes this and adds a test. Differential Revision: https://reviews.llvm.org/D23061 llvm-svn: 277461
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