Commits · 53280dba83afc6a23a808b4429ed1e026664bfba · Roger Ferrer / llvm-epi · GitLab

Apr 05, 2023
- [X86] combinePredicateReduction - reuse LowerVectorAllEqual for... · d73d62c4
  Simon Pilgrim authored Apr 05, 2023
  d73d62c4
- [ArgPromotion] Require noundef to copy poison-generating metadata · b066505d
  Nikita Popov authored Apr 05, 2023
  b066505d
- [X86] LowerVectorAllEqual - split ALLOF(CMPEQ(X,Y)) ->... · cc89ebe2
  Simon Pilgrim authored Apr 05, 2023
  cc89ebe2
- [GlobalISel] Improve stack slot tracking in dbg.values · 79a1e329
  Felipe de Azevedo Piovezan authored Apr 04, 2023
  79a1e329
- [X86] Convert tests to opaque pointers (NFC) · 0d022e7d
  Nikita Popov authored Apr 05, 2023
  
  0d022e7d
- [X86] Name instructions in test (NFC) · 79c1cf11
  Nikita Popov authored Apr 05, 2023
  
  79c1cf11
- [X86] Convert some tests to opaque pointers (NFC) · fa46f1ac
  Nikita Popov authored Apr 05, 2023
  
  fa46f1ac
- [AArch64][GlobalISel] Add support for some across-vector NEON intrinsics · 8f5db533
  Vladislav Dzhidzhoev authored Mar 28, 2023
  8f5db533
- [NFC][InstCombine] Add tests that show bogus combine of SVE intrinsics when using strictfp. · fe963a86
  Paul Walker authored Apr 04, 2023
  
  fe963a86
- [ARM] Fold fadd of vcmul into vcmla · 4f41a74d
  David Green authored Apr 05, 2023
  4f41a74d
- [dsymutil][NFC] Move ARM specific test into the ARM directory. · adeb1fa7
  Alexey Lapshin authored Apr 05, 2023
  adeb1fa7
- [Assignment Tracking][SROA] Handle createFragmentExpression failure · 76740fb4
  OCHyams authored Apr 05, 2023
  76740fb4
- [LV] Use available masked vector function variants when required · 185863f7
  Graham Hunter authored Sep 16, 2022
  185863f7
- [AArch64][SME] Fix an infinite loop in DAGCombine related to adding... · 7f05bdf4
  Dinar Temirbulatov authored Apr 05, 2023
  7f05bdf4
- [AMDGPU] Add machine verifier to a test · 13822e22
  Jay Foad authored Apr 05, 2023
  
  13822e22
- [ARM] Combine fadd into fcmla · b4df2b2c
  David Green authored Apr 05, 2023
  b4df2b2c
- [LICM] Don't require optimized uses · 7553bad1
  Nikita Popov authored Mar 24, 2023
  7553bad1
- [AArch64][DAGCombiner]: combine <2xi64> add/sub. · 6a8d8f3e
  Hassnaa Hamdi authored Mar 30, 2023
  6a8d8f3e
- [WebAssembly] Fix selection of global calls · 0e37487d
  Heejin Ahn authored Mar 29, 2023
  0e37487d
- [WebAssembly] Move call_indirect_alloca to call.ll · 47fc0186
  Heejin Ahn authored Apr 01, 2023
  47fc0186
- [Assignment Tracking] Ignore zero-sized fragments · 93c194fc
  OCHyams authored Apr 05, 2023
  93c194fc
- [PowerPC] Precommit test case for issue 61882. NFC. · 46396534
  Kai Luo authored Apr 05, 2023
  
  46396534
- [AArch64][SVE][CodeGen] Generate fused mul+add/sub ops with one of add/sub operands as splat · 99fc6ec3
  sgokhale authored Apr 05, 2023
  99fc6ec3
- [InstSimplify] Pre-land test for fp min/max optimization. · 17398b06
  Serguei Katkov authored Apr 05, 2023
  
  17398b06
- [FS-AFDO] Assign discriminators to pseudo probes · 5b461d5e
  Hongtao Yu authored Mar 30, 2023
  5b461d5e
- [M68k] Add `TRAP`, `TRAPV`, `BKPT`, `ILLEGAL` instructions · dbbf8ff8
  Ian Douglas Scott authored Apr 04, 2023
  dbbf8ff8
Apr 04, 2023
- [BPF] Fix assembly parsing errors for atomic_fetch_* instructions · d0d1431a
  Eduard Zingerman authored Apr 03, 2023
  d0d1431a
- [SPIR-V] Remove switch G_ICMP+G_BRCOND+G_BR before ISel · 8bfb2b6d
  Michal Paszkowski authored Mar 26, 2023
  8bfb2b6d
- [MC][WebAssembly] Fix type checking for bulk memory instructions · f56b5921
  Sam Clegg authored Apr 04, 2023
  f56b5921
- [msan] Fix handling of ParamTLS overflow. · e0f7ef4b
  Evgenii Stepanov authored Mar 24, 2023
  e0f7ef4b
- [LV] Add uses of recurrences in exit blocks in some tests. · b5925a22
  Florian Hahn authored Apr 04, 2023
  b5925a22
- [RISCV] Add tests for extract/insert subvector costs and extract lowering · dcaed92a
  Philip Reames authored Apr 04, 2023
  
  dcaed92a
- [RISCV][TTI] Cost SK_Tranpose as a generic two element shuffle · 8865ed4d
  Philip Reames authored Apr 03, 2023
  8865ed4d
- [Verifier] Verify sizes of matrix.multiply operands and specified shape. · 1a7cf7a1
  Florian Hahn authored Apr 04, 2023
  1a7cf7a1
- [DebugInfo][flang] Fix linking modules with similar DIStringType · b5e7a4e2
  Vladimir Radosavljevic authored Apr 04, 2023
  b5e7a4e2
- [amdgpu] Implement dynamic LDS accesses from non-kernel functions · 0507448d
  Jon Chesterfield authored Apr 04, 2023
  0507448d
- [MergedLoadStoreMotion] Merge stores with conflicting value types · 9b79d0b6
  Jeff Byrnes authored Mar 28, 2023
  9b79d0b6
- Revert "AMDGPU: Created a subclass for the return address operand in the tail... · 282b8ac1
  Changpeng Fang authored Apr 04, 2023
  282b8ac1
- [AArch64][GlobalISel][RegBankSelect] Guess the bank for loads using the MMO. · a401e10f
  Amara Emerson authored Apr 04, 2023
  a401e10f
- AMDGPU: Created a subclass for the return address operand in the tail call return instruction · 461a559b
  Changpeng Fang authored Apr 04, 2023
  461a559b