build so check and turn on -Wmissing-field-initializers. While there,
reorganize the conditional warning code based on compiler to be a bit
more obvious and inside a switch statement.

llvm-svn: 244330

llvm-svn: 244329

llvm-svn: 244328

Hope this fixes the s390 and aarch64 bots.

llvm-svn: 244327

Suggestion by David Blaikie!

llvm-svn: 244326

This is committed on behalf of Kelvin Li
http://reviews.llvm.org/D11469?id=31227

llvm-svn: 244325

Until all problems with the buildbot can be identified and fixed.

llvm-svn: 244324

llvm-svn: 244323

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11810

llvm-svn: 244322

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11809

llvm-svn: 244321

In tree they are only used by llvm-readobj, but it is also used by
https://github.com/mono/CppSharp.

While at it, add some missing error checking.

llvm-svn: 244320

llvm-dsymutil has to be able to process debug info produced by other compilers
which use different line table settings. The testcase wasn't generated by
another compiler, but by a modified clang.

llvm-svn: 244319

NFC patch for current users, but llvm-dsymutil will use the new
functionality to adapt to the input linetable.

Based on a patch by Adrian Prantl.

llvm-svn: 244318

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11266

llvm-svn: 244317

This test was in an infinite loop in AArch64. We're investigating it
on PR24389, but I'm disabling it for now, so that we continue testing
everything else.

llvm-svn: 244316

llvm-svn: 244315

Summary:
Port the ReconstructShuffle function from AArch64 to ARM
to handle mismatched incoming types in the BUILD_VECTOR
node.

This fixes an outstanding FIXME in the ReconstructShuffle
code.

Reviewers: t.p.northover, rengolin

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D11720

llvm-svn: 244314

This reverts r242520, as it caused pr24379. Also removes part of the test added
by r243874 that checks the size of alias symbols.

llvm-svn: 244313

‘clang::tooling::JSONAnchorDest’ defined but not used [-Wunused-variable]
from gcc 5.1.

llvm-svn: 244312

llvm-svn: 244311

v2: Also remove LLVM 3.6 traces from prepare-builtins.cpp

Patch by: EdB

llvm-svn: 244310

llvm-svn: 244309

This change :

    - Fixes offsets of all register sets for Mips.
    - Adds MSA register set and FRE=1 mode support for FP register set.
    - Separates lldb register numbers and register infos of freebsd/mips64 from linux/mips64.
    - Re-orders the register numbers of all kinds for mips to be consistent with freebsd order of register numbers.
    - Eliminates ENABLE_128_BIT_SUPPORT and union ValueData from Scalar.cpp and uses llvm::APInt and llvm::APFloat for all integer and floating point types.

Reviewers : emaste, jaydeep, clayborg
Subscribers : emaste, mohit.bhakkad, nitesh.jain, bhushan
Differential : http://reviews.llvm.org/D10919

llvm-svn: 244308

Make sure the Features field of the Builtin Info struct is always initialized. Silences -Wmissing-field-initializers.

While there convert 0 in the BUILTIN macros to nullptr.

llvm-svn: 244307

... and add aarch32 to specifically refer to the 32-bit ones.

Previously, 'arm' meant only 32-bit architectures and there was no way
for a module to build with both 32 and 64 bit ARM architectures.

Now a module that is intended to work on both architectures can specify
    requires arm
whereas a module only for 32-bit platforms can say
    requires aarch32
and just like before, 64-bit only can say
    requires aarch64

llvm-svn: 244306

Summary: WebAssembly's tablegen instructions have the names WebAssembly expects, but by LLVM convention they're uppercase and suffixed with their type after an underscore. Leave the C++ code that way, but print outt he names WebAssembly expects (lowercase, no type). We could teach tablegen to do this later, maybe by using `!cast<string>(node)` in the .td files.

Reviewers: sunfish

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D11776

llvm-svn: 244305

Reviewers: rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11458

llvm-svn: 244303

As a follow-up to r244181, resolve uniquing cycles underneath distinct
nodes on the fly.  This prevents uniquing cycles in early operands from
affecting later operands.  It also removes an iteration through distinct
nodes' operands.

No real functional change here, just more prompt resolution of temporary
nodes.

llvm-svn: 244302

Pull out a helper for resolving uniquing cycles of `Metadata` to remove
the boiler-plate of downcasting to `MDNode`.

llvm-svn: 244301

llvm-svn: 244300

The block address machine operands can reference IR blocks in other functions.
This commit fixes a bug where the references to unnamed IR blocks in other
functions weren't serialized correctly.

llvm-svn: 244299

Reviewers: ovyalov

Subscribers: tberghammer, danalbert, srhines, lldb-commits

Differential Revision: http://reviews.llvm.org/D11825

llvm-svn: 244298

llvm-svn: 244297

llvm-svn: 244296

This commit removes the 'StringOffset' and 'HasStringValue' fields from the
MIToken struct and simplifies the 'stringValue' method which now returns
the new 'StringValue' field.

This commit also adopts a different way of initializing the lexed tokens -
instead of constructing a new MIToken instance, the lexer resets the old token
using the new 'reset' method and sets its attributes using the new
'setStringValue', 'setOwnedStringValue', and 'setIntegerValue' methods.

Reviewers: Sean Silva

Differential Revision: http://reviews.llvm.org/D11792

llvm-svn: 244295

Patch by Debora Setton Sanches! <setton.debora@gmail.com>

llvm-svn: 244294

Patch by Debora Setton Sanches! <setton.debora@gmail.com>

llvm-svn: 244293

Differential Revision: http://reviews.llvm.org/D11736

llvm-svn: 244292

When we are not emitting the condition for the branch, because the condition is
in another BB or SDAG did the selection for us, then we have to mask the flag in
the register with AND.

This is required when the condition comes from a truncate, because SDAG only
truncates down to a legal size of i32.

This fixes rdar://problem/22161062.

llvm-svn: 244291

llvm-svn: 244290