- Dec 14, 2017
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Shoaib Meenai authored
Newer versions of CMake (I'm on 3.10, but I believe 3.9 behaves the same way) attempt to query the system for information about the VS 2017 install. Unfortunately, this query fails on non-Windows systems: cmake_host_system_information does not recognize <key> VS_15_DIR CMake isn't going to find these system libraries on non-Windows anyway (and we were previously silencing the resultant warnings in our cross-compilation toolchain), so it makes sense to just omit the attempted installation entirely on non-Windows. Differential Revision: https://reviews.llvm.org/D41220 llvm-svn: 320724
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Craig Topper authored
This doesn't match the semantics of the extract_vector_elt operation. Nothing downstream knows the bits were zeroed so they still get masked or sign extended after the extrat anyway. llvm-svn: 320723
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Krzysztof Parzyszek authored
HVX does not support operations on 64-bit integers. llvm-svn: 320722
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Zachary Turner authored
While I'm pushing cleanup changes, this also fixes a few warnings related to extraneous semicolons. llvm-svn: 320720
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Zachary Turner authored
This adds the /DEBUG:GHASH option to LLD which will look for the existence of .debug$H sections in linker inputs and use them to accelerate type merging. The clang-cl side has already been added, so this completes the work necessary to begin experimenting with this feature. Differential Revision: https://reviews.llvm.org/D40980 llvm-svn: 320719
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Geoff Berry authored
Fixes expensive-check ARM buildbot failure. llvm-svn: 320718
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Gadi Haber authored
NFC. Adding MC regressions tests to cover the AVX and AVX2 ISA sets. This patch is part of a larger task to cover MC encoding of all X86 ISA Sets. See revision: https://reviews.llvm.org/D39952 Reviewers: zvi, RKSimon, aymanmus, m_zuckerman Differential Revison: https://reviews.llvm.org/D40287 Change-Id: I304687a2b7abb473f79de99c31fc55c97b2662da llvm-svn: 320716
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Simon Dardis authored
llvm-svn: 320715
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Yaxun Liu authored
This commit might have caused regression on ppc64. Revert it to verify that. llvm-svn: 320712
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Sander de Smalen authored
Summary: The generated diagnostic by the AsmMatcher isn't always applicable to the AsmOperand. This is because the code will only update the diagnostic if it is more specific than the previous diagnostic. However, when having validated operands and 'moved on' to a next operand (for some instruction/alias for which all previous operands are valid), if the diagnostic is InvalidOperand, than that should be set as the diagnostic, not the more specific message about a previous operand for some other instruction/alias candidate. (Re-committed with an extra whitespace in SVEInstrFormats.td to trigger rebuild of AArch64GenAsmMatcher.inc, since the llvm-clang-x86_64-expensive-checks-win builder does not seem to rebuild AArch64GenAsmMatcher.inc with the newly built TableGen due to a missing dependency somewhere (see: http://lists.llvm.org/pipermail/llvm-dev/2017-December/119555.html)) Reviewers: craig.topper, olista01, rengolin, stoklund Reviewed By: olista01 Subscribers: javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D40011 llvm-svn: 320711
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Eugene Leviant authored
Differential revision: https://reviews.llvm.org/D41238 llvm-svn: 320710
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Simon Dardis authored
MIPSR6 introduced several new jump instructions and deprecated the use of the 'j' instruction. For microMIPS32R6, 'j' was removed entirely and it only has non delay slot jumps. This patch adds support for MIPSR6 by using some R6 instructions-- 'bc' instead of 'j', 'jic $reg, 0' instead of 'jalr $zero, $reg'-- and modifies the sequences not to use delay slots for R6. Reviewers: atanasyan Reviewed By: atanasyan Subscribers: dschuff, arichardson, llvm-commits Differential Revision: https://reviews.llvm.org/D40786 llvm-svn: 320703
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Bjorn Pettersson authored
Summary: The function is meant to recurse until it comes upon the phi it's looking for. However, with the current condition, it will recurse until it finds anything _but_ the phi. The function will even fail for simple cases like: %i = phi i32 [ %inc, %loop ], ... ... %inc = add i32 %i, 1 because the base condition will not happen when the phi is recursed to, and the recursion will end with a 'false' result since the previous instruction is a phi. Reviewers: sanjoy, atrick Reviewed By: sanjoy Subscribers: Ka-Ka, bjope, llvm-commits Committing on behalf of: Bevin Hansson (bevinh) Differential Revision: https://reviews.llvm.org/D40946 llvm-svn: 320700
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Haicheng Wu authored
This patch fix this FIXME in visitPHI() FIXME: We should potentially be tracking values through phi nodes, especially when they collapse to a single value due to deleted CFG edges during inlining. Differential Revision: https://reviews.llvm.org/D38594 llvm-svn: 320699
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Benjamin Kramer authored
This reverts commit r320679. Causes miscompiles. llvm-svn: 320698
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Andrew V. Tischenko authored
llvm-svn: 320693
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Omer Paparo Bivas authored
Change-Id: I1b8188dc3c6c7c0f455715364ece7d35ef485f2f llvm-svn: 320692
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Michael Zuckerman authored
store operation on a truncated memory (load) of vXi1 is poorly supported by LLVM and most of the time end with an assertion. This patch fixes this issue. Differential Revision: https://reviews.llvm.org/D39547 Change-Id: Ida5523dd09c1ad384acc0a27e9e59273d28cbdc9 llvm-svn: 320691
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Simon Pilgrim authored
llvm-svn: 320690
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Simon Pilgrim authored
Rewrote to use inline asm for full coverage llvm-svn: 320689
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Fedor Sergeev authored
Summary: Passing AliasAnalysis results instead of nullptr appears to work just fine. A couple new-pass-manager tests updated to align with new order of analyses. Reviewers: chandlerc, spatel, craig.topper Reviewed By: chandlerc Subscribers: mehdi_amini, eraman, llvm-commits Differential Revision: https://reviews.llvm.org/D41203 llvm-svn: 320687
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Fedor Sergeev authored
llvm-svn: 320686
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Francis Visoiu Mistrih authored
Work towards the unification of MIR and debug output by printing `<mcsymbol sym>` instead of `<MCSym=sym>`. Only debug syntax is affected. llvm-svn: 320685
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Francis Visoiu Mistrih authored
Work towards the unification of MIR and debug output by refactoring the interfaces. llvm-svn: 320684
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Francis Visoiu Mistrih authored
Work towards the unification of MIR and debug output by printing `liveout(...)` instead of `<regliveout>`. Only debug syntax is affected. llvm-svn: 320683
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Francis Visoiu Mistrih authored
Work towards the unification of MIR and debug output by printing `@foo` instead of `<ga:@foo>`. Also print target flags in the MIR format since most of them are used on global address operands. Only debug syntax is affected. llvm-svn: 320682
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Francis Visoiu Mistrih authored
Work towards the unification of MIR and debug output by printing `$symbol` instead of `<es:symbol>`. Only debug syntax is affected. llvm-svn: 320681
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Igor Laevsky authored
Differential Revision: https://reviews.llvm.org/D40391 llvm-svn: 320680
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Sam Parker authored
Recommitting rL319773, which was reverted due to a recursive issue causing timeouts. This happened because I failed to check whether the discovered loads could be narrowed further. In the case of a tree with one or more narrow loads, that could not be further narrowed, as well as a node that would need masking, an AND could be introduced which could then be visited and recombined again with the same load. This could again create the masking load, with would be combined again... We now check that the load can be narrowed so that this process stops. Original commit message: Search from AND nodes to find whether they can be propagated back to loads, so that the AND and load can be combined into a narrow load. We search through OR, XOR and other AND nodes and all bar one of the leaves are required to be loads or constants. The exception node then needs to be masked off meaning that the 'and' isn't removed, but the loads(s) are narrowed still. Differential Revision: https://reviews.llvm.org/D41177 llvm-svn: 320679
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Craig Topper authored
We should be able to support ANY_EXTEND for any types we support ZERO_EXTEND for. llvm-svn: 320675
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Craig Topper authored
A v32i1 CONCAT_VECTORS of v16i1 uses promotion to v32i8 to legalize the v32i1. This results in a bunch of extract_vector_elts and a build_vector that ultimately gets scalarized. This patch checks to see if v16i8 is legal and inserts a any_extend to that so that we can concat v16i8 to v32i8 and avoid creating the extracts. llvm-svn: 320674
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Craig Topper authored
These calls already exist earlier under AVX2 feature. llvm-svn: 320673
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Dorit Nuzman authored
D30041 extended SCEVPredicateRewriter to improve handling of Phi nodes whose update chain involves casts; PSCEV can now build an AddRecurrence for some forms of such phi nodes, under the proper runtime overflow test. This means that we can identify such phi nodes as an induction, and the loop-vectorizer can now vectorize such inductions, however inefficiently. The vectorizer doesn't know that it can ignore the casts, and so it vectorizes them. This patch records the casts in the InductionDescriptor, so that they could be marked to be ignored for cost calculation (we use VecValuesToIgnore for that) and ignored for vectorization/widening/scalarization (i.e. treated as TriviallyDead). In addition to marking all these casts to be ignored, we also need to make sure that each cast is mapped to the right vector value in the vector loop body (be it a widened, vectorized, or scalarized induction). So whenever an induction phi is mapped to a vector value (during vectorization/widening/ scalarization), we also map the respective cast instruction (if exists) to that vector value. (If the phi-update sequence of an induction involves more than one cast, then the above mapping to vector value is relevant only for the last cast of the sequence as we allow only the "last cast" to be used outside the induction update chain itself). This is the last step in addressing PR30654. llvm-svn: 320672
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Gadi Haber authored
NFC. Adding MC regressions tests to cover the AES and AVXAES ISA sets both 32 and 64 bit. This patch is part of a larger task to cover MC encoding of all X86 ISA Sets. started in revision: https://reviews.llvm.org/D39952 Reviewers: zvi, craig.topper, m_zuckerman, RKSimon Differential Revision: https://reviews.llvm.org/D41154 Change-Id: I2564f9797628d0c070c4766f837f399337fb87d2 llvm-svn: 320670
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Craig Topper authored
[SelectionDAG] When legalizing the result type of CONCAT_VECTORS, take into account whether the input type also needs to be promoted. If so go ahead and get the promoted input vector to extract from. Previously, we would create a bunch of any_extends of extract_vector_elts with illegal input type that needs to be promoted. The legalization of those extract_vector_elts would then potentially introduce a truncate. So now we have a bunch of any_extends of truncates. By legalizing both parts together we avoid creating these extra nodes. The test changes seem to be because we were previously combining the build_vector with the any_extend before the any_extend got combined with the truncate. llvm-svn: 320669
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Matthias Braun authored
Factor out duplicated code emitting mach-o version-min specifiers. This should be NFC but happens to fix a bug where the code in MCMachoStreamer didn't take the version skew between darwin and macos versions into account. llvm-svn: 320666
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Matthias Braun authored
LC_BUILD_VERSION is a new load command superseding the previously used LC_XXX_MIN_VERSION commands. This adds an assembler directive along with encoding/streaming support. llvm-svn: 320661
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Petr Hosek authored
Some external projects depend on this LLVM CMake variable. Differential Revision: https://reviews.llvm.org/D41205 llvm-svn: 320658
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Shoaib Meenai authored
When the Windows SDK is hosted on a case-sensitive filesystem (e.g. when compiling on Linux and not using ciopfs), we can automatically generate a VFS overlay for headers and symlinks for libraries. Differential Revision: https://reviews.llvm.org/D41156 llvm-svn: 320657
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Shoaib Meenai authored
Allow building for other architectures when cross-compiling for Windows. Differential Revision: https://reviews.llvm.org/D41158 llvm-svn: 320656
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