Commits · a55632a069d89804938d7ef33192888f539b3bc8 · Roger Ferrer / llvm-epi · GitLab

Oct 28, 2021
- Reland "[ARM] __cxa_end_cleanup should be called instead of _UnwindResume." · d8075e87
  Daniel Kiss authored Oct 27, 2021
  d8075e87
- [WebAssembly] Fix debug locations for ExplicitLocals pass · a66451eb
  Wouter van Oortmerssen authored Oct 25, 2021
  a66451eb
- [InstCombine] Fixed non-determinisctic order of new instructions · f7f430c9
  Stanislav Mekhanoshin authored Oct 28, 2021
  f7f430c9
- [InstCombine] Fold `(c & ~(a | b)) | (b & ~(a | c))` to `~a & (b ^ c)` · 5a7a4583
  Stanislav Mekhanoshin authored Oct 21, 2021
  5a7a4583
- [AArch64] Rename some timm predicates for consistency. NFC. · bef77720
  Ahmed Bougacha authored Oct 28, 2021
  bef77720
- [IRSymTab] Mark __stack_chk_guard used · ac02bcad
  Yuanfang Chen authored Oct 28, 2021
  ac02bcad
- [Internalize] Preserve __stack_chk_fail in Internalizer correctly · c18ed698
  Yuanfang Chen authored Oct 28, 2021
  c18ed698
- [TwoAddressInstructionPass] Put all new instructions into DistanceMap · 1e46dcb7
  Guozhi Wei authored Oct 28, 2021
  1e46dcb7
- X86InstrInfo: Support immediates that are +1/-1 different in optimizeCompareInstr · e2c7ee07
  Matthias Braun authored Sep 27, 2021
  e2c7ee07
- X86InstrInfo: Optimize more combinations of SUB+CMP · 97a1570d
  Matthias Braun authored Sep 27, 2021
  97a1570d
- [VPlan] Keep induction recipes in header. · c45045bf
  Florian Hahn authored Oct 28, 2021
  c45045bf
- MachineDominators: Define MachineDomTree type alias · b437aaa6
  Nicolai Hähnle authored Oct 28, 2021
  b437aaa6
- [CGProfile] Don't emit call graph profile edges with zero weight · 793b481f
  Leonard Grey authored Oct 28, 2021
  793b481f
- Revert "Reland "[ARM] __cxa_end_cleanup should be called instead of _UnwindResume."" · 66e03db8
  Daniel Kiss authored Oct 28, 2021
  66e03db8
- Reland "[ARM] __cxa_end_cleanup should be called instead of _UnwindResume." · b6420e57
  Daniel Kiss authored Oct 27, 2021
  b6420e57
- [InstCombine] Extend canonicalizeClampLike to handle truncated inputs · 9358384f
  David Green authored Oct 28, 2021
  9358384f
- [DSE] Eliminates redundant store of an exisiting value (PR16520) · f87e0c68
  Dawid Jurczak authored Oct 22, 2021
  f87e0c68
- [InstCombine] Fix rare condition violation in canonicalizeClampLike · 79011c70
  David Green authored Oct 28, 2021
  79011c70
- [X86][AVX] Attempt to fold a scaled index into a gather/scatter scale immediate (PR13310) · d29ccbec
  Simon Pilgrim authored Oct 28, 2021
  d29ccbec
- [SLP]Improve/fix reordering of the gathered graph nodes. · 07ef9f51
  Alexey Bataev authored Oct 25, 2021
  07ef9f51
- [InstCombine] allow Negator to fold multi-use select with constant arms · e8535fa7
  Sanjay Patel authored Oct 28, 2021
  e8535fa7
- [InstCombine][ConstantFolding] Make ConstantFoldLoadThroughBitcast TypeSize-aware · 98f08752
  Peter Waller authored Oct 28, 2021
  98f08752
- [AMDGPU] Add 24-bit mulhi intrinsics in INTRINSIC_WO_CHAIN combine. · 2da6ef36
  Abinav Puthan Purayil authored Oct 28, 2021
  2da6ef36
- [AMDGPU][GlobalISel] Fix waterfall loops · fd1cfc90
  Sebastian Neubauer authored Oct 28, 2021
  fd1cfc90
- [GlobalISel] Simplify RegBankSelect · 50d8d963
  Neubauer, Sebastian authored Oct 25, 2021
  50d8d963
- [Driver][AArch64]Add driver support for neoverse-512tvb target · 2186b011
  Caroline Concatto authored Oct 22, 2021
  2186b011
- [Support] [Windows] Manually clean up temp files if not setting delete disposition · 177176f7
  Martin Storsjö authored Oct 04, 2021
  177176f7
- [CSSPGO] Trim cold base profiles for the CS preinliner. · 259e4c56
  Hongtao Yu authored Oct 27, 2021
  259e4c56
- [RISCV] Sync Zvlsseg register order as the same as vector registers. · 7051f73d
  Hsiangkai Wang authored Sep 23, 2021
  7051f73d
- [AMDGPU] Remove unused declaration findNumUsedRegistersSI (NFC) · cee3419d
  Kazu Hirata authored Oct 27, 2021
  
  cee3419d
- [X86] Add a dependency breaking xor before any gathers with an undef passthru value. · 2bc28c6f
  Phoebe Wang authored Oct 28, 2021
  2bc28c6f
- [RISCV] Use vmv.v.[v|i] if we know COPY is under the same vl and vtype. · 0a9b8296
  Hsiangkai Wang authored Jul 02, 2021
  0a9b8296
- [SCEV] Invalidate user SCEVs along with operand SCEVs to avoid cache corruption · 513914e1
  Max Kazantsev authored Oct 28, 2021
  513914e1
- [RISCV] Replace most uses of RISCVSubtarget::hasStdExtV. NFCI · 1387483e
  Craig Topper authored Oct 27, 2021
  1387483e
- [Attributor][FIX] Do not ignore memory writes in AAMemoryBehavior · acf30931
  Johannes Doerfert authored Sep 13, 2021
  acf30931
- [Attributor][NFC] Improve debug messages · 734f9144
  Johannes Doerfert authored Sep 08, 2021
  
  734f9144
- [ARM] Use hardware TLS register in Thumb2 mode when -mtp=cp15 is passed · d7e089f2
  Ard Biesheuvel authored Oct 27, 2021
  d7e089f2
- Revert "[ORC] Change SPSExecutorAddr serialization, SupportFunctionCall struct." · 20675d8f
  Lang Hames authored Oct 27, 2021
  20675d8f
- [Attributor][FIX] Use right address space to avoid assertion · 8a4551b8
  Johannes Doerfert authored Oct 26, 2021
  8a4551b8
- [ORC] Change SPSExecutorAddr serialization, SupportFunctionCall struct. · e32b1eee
  Lang Hames authored Oct 27, 2021
  e32b1eee