Commits · c302f1e6771b0cbfad466e56f19e36d4dcaecd11 · Roger Ferrer / llvm-epi · GitLab

Feb 08, 2022
- AMDGPU: Reserve v32 if we may need to copy between AGPRs on gfx908 · 8b2ca766
  Matt Arsenault authored Dec 14, 2021
  8b2ca766
- AMDGPU: Regenerate mir test checks to include -NEXT · a7f60bfd
  Matt Arsenault authored Feb 04, 2022
  
  a7f60bfd
- [SDAG] enable binop identity constant folds for fmul/fdiv · 905abc5b
  Sanjay Patel authored Feb 08, 2022
  905abc5b
- [AArch64][CodeGen] Always use SVE (when enabled) to lower 64-bit vector multiplies · eabae1b0
  David Sherwood authored Feb 02, 2022
  eabae1b0
- [AMDGPURewriteOutArguments] Don't use pointer element type · 99702734
  Nikita Popov authored Feb 08, 2022
  99702734
- [X86] selectLEAAddr - relax heuristic to only require one operand to be a... · 0b00cd19
  Simon Pilgrim authored Feb 08, 2022
  0b00cd19
- [GlobalISel] Add big endian support in CallLowering · 76c83e74
  Sheng authored Feb 08, 2022
  76c83e74
- [AMDGPU] Regenerate test checks (NFC) · 9cc83bfd
  Nikita Popov authored Feb 08, 2022
  9cc83bfd
- [VE] v256.32|64 setcc isel and tests · ae1bb44e
  Simon Moll authored Feb 08, 2022
  ae1bb44e
- [AArch64] Attempt to emitConjunction from brcond · fdce239a
  David Green authored Feb 08, 2022
  fdce239a
- [AArch64] FeaturePerfMon Added to CPUs · 95b8a3e5
  Mubashar Ahmad authored Jan 27, 2022
  95b8a3e5
- [RISCV] Optimize splats of extracted vector elements · 62c4ac76
  Fraser Cormack authored Jan 28, 2022
  62c4ac76
- [AArch64] Add some additional tests for conditions of branches. NFC · f21dd70f
  David Green authored Feb 08, 2022
  
  f21dd70f
- [CodeGen][test] XFAIL CodeGen/Generic/ForceStackAlign.ll on SPARC · 541171f0
  Rainer Orth authored Feb 08, 2022
  541171f0
- [RISCV] Split f64 undef into two i32 undefs · c53d99c3
  Pengcheng Wang authored Feb 08, 2022
  c53d99c3
- [RISCV] Pre-commit test for D118222 · cb0fff43
  Pengcheng Wang authored Feb 08, 2022
  cb0fff43
- [AMDGPU] Allow hoisting of some VALU compare instructions · a1fb307b
  Carl Ritson authored Feb 08, 2022
  a1fb307b
- [M68k][GlobalISel] Implement lowerCall based on M68k calling convention · 5aa3af3f
  Sheng authored Feb 07, 2022
  5aa3af3f
- [GlobalISel][Legalizer] Support reducing load/store width in big endian order · 146c7820
  Sheng authored Feb 07, 2022
  
  146c7820
- M68K: Pre-commit test of D116931 · 0fe419fa
  Sheng authored Feb 07, 2022
  
  0fe419fa
Feb 07, 2022
- [SDAG] try to fold one-demanded-bit-of-multiply · d1ecfaa0
  Sanjay Patel authored Feb 07, 2022
  d1ecfaa0
- [SDAG] SimplifyDemandedBits - generalize fold for 2 LSB of X*X · fc6bee1c
  Sanjay Patel authored Feb 07, 2022
  fc6bee1c
- [AArch64] add tests for demanded bits of multiply; NFC · e4e671c5
  Sanjay Patel authored Feb 07, 2022
  e4e671c5
- [AMDGPU] Fix debug values in scheduler not placed correctly when reverting · 57047119
  Vang Thao authored Feb 04, 2022
  57047119
- [ARM] Undeprecate complex IT blocks · 3d766214
  Mark Murray authored Jan 24, 2022
  3d766214
- [x86] avoid false dependency stall on 'sbb' with same source reg · 40a50f87
  Sanjay Patel authored Feb 07, 2022
  40a50f87
- AMDGPU: Fix clobbering SCC when expanding large offset spill pseudos · 31973062
  Matt Arsenault authored Nov 01, 2021
  31973062
- [AArch64][NEON][SVE] Lower FCOPYSIGN using AArch64ISD::BSP · be826cf4
  David Truby authored Jan 27, 2022
  be826cf4
- [X86][SSE] Add some initial PAVGB/PAVGW tests · 2e0409a5
  Simon Pilgrim authored Feb 07, 2022
  2e0409a5
- [CSKY] Add inline asm constraints and related codegen support · a190fcdf
  Zi Xuan Wu authored Feb 07, 2022
  a190fcdf
- [X86] Add fp80 copysign test coverage · 289b8e0d
  Simon Pilgrim authored Feb 07, 2022
  289b8e0d
- [X86] Add test cases for fmul/fdiv with select. · 24562bab
  Luo, Yuanke authored Feb 07, 2022
  
  24562bab
- [DAGCombiner][AArch64] Enhance to support for scalar CSINC · b3b129f1
  zhongyunde 00443407 authored Jan 10, 2022
  b3b129f1
- [X86] Add pre-commit test for bit test optimization. NFC · 8bb32e5c
  Phoebe Wang authored Feb 07, 2022
  
  8bb32e5c
Feb 06, 2022
- [DAGCombiner][RISCV] Allow rotates by non-constant to be matched for i32 on riscv64 with Zbb. · c35ccd2a
  Craig Topper authored Feb 06, 2022
  c35ccd2a
- [DAGCombiner] Fold SSHLSAT/USHLSAT to SHL when no saturation will occur · cecf11c3
  Bjorn Pettersson authored Feb 02, 2022
  cecf11c3
- Pre-commit test cases for DAG combine folds of SSHLSAT/USHLSAT -> SHL · 0f685976
  Bjorn Pettersson authored Feb 02, 2022
  0f685976
- [ARM] Mark i64 and f64 shuffles as Custom for MVE · b7d3a2b6
  David Green authored Feb 06, 2022
  b7d3a2b6
- [ARM] Add extra vabd, vhadd and vmulh tests. NFC · 3dff4f5c
  David Green authored Feb 06, 2022
  3dff4f5c
- [X86] Fold ZERO_EXTEND_VECTOR_INREG(BUILD_VECTOR(X,Y,?,?)) -> BUILD_VECTOR(X,0,Y,0) · 74b98ab1
  Simon Pilgrim authored Feb 06, 2022
  74b98ab1