Commits · d26344731128ccdd8eeb27a12b2c3bd75e5e3a63 · Roger Ferrer / llvm-epi · GitLab

Jul 05, 2022
- [RuntimeDyld] Fix R_AARCH64_TSTBR14 relocation · b27d6ffe
  Vladislav Khmelevsky authored Jun 28, 2022
  b27d6ffe
- [SCEV] Fix isImpliedViaMerge() with values from previous iteration (PR56242) · e4d1d0cc
  Nikita Popov authored Jun 27, 2022
  e4d1d0cc
- [AMDGPU][GlobalISel] Support register offsets for SMRDs. · 8cd79bc1
  Ivan Kosarev authored Jul 05, 2022
  8cd79bc1
- [SimplifyCFG] Thread all predecessors with same value at once · dc969061
  Nikita Popov authored Jul 05, 2022
  dc969061
- [SimplifyCFG] Add additional jump threading test (NFC) · 02ab87f5
  Nikita Popov authored Jul 05, 2022
  02ab87f5
- [VE] Restructure eliminateFrameIndex · da5a6b2b
  Kazushi (Jam) Marukawa authored Jul 05, 2022
  da5a6b2b
- Revert "[VE] Restructure eliminateFrameIndex" · 9ad38e52
  Kazushi (Jam) Marukawa authored Jul 05, 2022
  9ad38e52
- [VE] Restructure eliminateFrameIndex · 98e52e8b
  Kazushi (Jam) Marukawa authored Jul 02, 2022
  98e52e8b
- [ARM] Add Support for Cortex-M85 · 1666f099
  Archibald Elliott authored Jul 05, 2022
  1666f099
- [IndVars] Precommit test with redundant FPToSI. · 271b470f
  Florian Hahn authored Jul 05, 2022
  271b470f
- [InstCombine] improve fold for icmp_eq_and to icmp_ult · b43dd2f6
  Chenbing Zheng authored Jul 05, 2022
  b43dd2f6
- [InstCombine] add negtive tests for (%x & C) == 0 -> %x u< (-C). nfc · 00cb1c33
  Chenbing Zheng authored Jul 05, 2022
  
  00cb1c33
- [AArch64][SME] Add SME addha/va intrinsics · 77b13a57
  David Sherwood authored Jun 15, 2022
  77b13a57
- Revert "[VectorCombine] Improve shuffle select shuffle-of-shuffles" · b69c75d5
  Nikita Popov authored Jul 05, 2022
  b69c75d5
- [llvm-objcopy] -O binary: align sh_offset for section changed from SHT_NOBITS · 0c01f42f
  Fangrui Song authored Jul 04, 2022
  0c01f42f
- [LoongArch] Add initial support for function calls · 3610d5f5
  wanglei authored Jul 05, 2022
  3610d5f5
- [LoongArch] Add codegen support for conditional branches · b940fe6f
  wanglei authored Jul 05, 2022
  b940fe6f
- [LoongArch] Add codegen support for load/store operations · 5b4851ed
  wanglei authored Jul 05, 2022
  5b4851ed
- [InstCombine] Make use of low zero bits to determine exact int->fp cast · b2b4c872
  zhongyunde authored Jul 05, 2022
  b2b4c872
- [InstCombine] fold sub of min/max of sub with common operand · 142aca77
  Sanjay Patel authored Jul 04, 2022
  142aca77
- [InstCombine] add tests for sub of smin/smax; NFC · 8ef05327
  Sanjay Patel authored Jul 04, 2022
  8ef05327
Jul 04, 2022
- [InstCombine] add helper function for sub-of-min/max folds; NFC · 4276d00b
  Sanjay Patel authored Jul 04, 2022
  4276d00b
- [X86] Regenerate fold-tied-op.ll test checks · 623250b5
  Simon Pilgrim authored Jul 04, 2022
  
  623250b5
- [AArch64] Add support for insert/extract for nxv1i1 types. · 5785717e
  Sander de Smalen authored Jul 04, 2022
  5785717e
- [X86] Disable combineVectorSizedSetCCEquality for soft float. · 2bfca356
  Craig Topper authored Jul 04, 2022
  2bfca356
- [SLP] add test for load combining + shuffling; NFC · 10ebaf76
  Sanjay Patel authored Jul 04, 2022
  10ebaf76
- [Bitcode] Use bitcode input for test (NFC) · 89cb8cae
  Nikita Popov authored Jul 04, 2022
  89cb8cae
- [LTO] Update remark test after 644a965c . · 8471c686
  Florian Hahn authored Jul 04, 2022
  
  8471c686
- [RISCV] Add ADDI instr for computing FrameIndex address · c06d0b4d
  luxufan authored Jun 19, 2022
  c06d0b4d
- [LV] Vectorize cases with larger number of RT checks, execute only if profitable. · 644a965c
  Florian Hahn authored Jul 04, 2022
  644a965c
- [llvm-ar][test] Add additional MRI script testing · 2ab260ee
  gbreynoo authored Jul 04, 2022
  2ab260ee
- [SLP] Peek into loads when hitting the RecursionMaxDepth · 2de05afc
  David Green authored Jul 04, 2022
  2de05afc
- [VectorCombine] Improve shuffle select shuffle-of-shuffles · 19a1e20b
  David Green authored Jul 04, 2022
  19a1e20b
- [AArch64] Add additional tests for D120481. · f0089fae
  Florian Hahn authored Jul 04, 2022
  
  f0089fae
- [IR] Remove support for insertvalue constant expression · 7283f48a
  Nikita Popov authored Jun 28, 2022
  7283f48a
- [RISCV] Add more SHXADD patterns. · d36e09cf
  Craig Topper authored Jul 03, 2022
  d36e09cf
- [AIX] Handling the label alignment of a global · d2a35e4d
  esmeyi authored Jul 03, 2022
  d2a35e4d
- [SCEV] recognize llvm.annotation intrinsic · 2c3784cf
  Chen Zheng authored Jun 29, 2022
  2c3784cf
Jul 03, 2022
- [InstCombine] fold negated low-bit-mask to cmp+select · f9f40aa1
  Sanjay Patel authored Jul 03, 2022
  f9f40aa1
- [InstCombine] add tests for and-of-negated-lowbitmask; NFC · c1c3134a
  Sanjay Patel authored Jul 03, 2022
  
  c1c3134a