Commits · d95b5d449070e4514bb983f4cb9d4e7b596d6352 · Roger Ferrer / llvm-epi · GitLab

Feb 23, 2016
- Remove a space after a trailing backslash. · d95b5d44
  Alexander Kornienko authored Feb 23, 2016
  d95b5d44
- [AMDGPU] Fix operands of S_BFE_U64 and S_BFM_B64 · 2a62b3c2
  Nikolay Haustov authored Feb 23, 2016
  2a62b3c2
- AVX512: Fix predicate of AVX pcmpeqw/b , pcmpgtb/w/d instructions . AVX512... · 1360f4db
  Igor Breger authored Feb 23, 2016
  1360f4db
- [WinEH] Visit 'unwind to caller' catchswitches nested in catchswitches · 17525aba
  David Majnemer authored Feb 23, 2016
  17525aba
- Add prefix based function layout when profile is available. · f84b6300
  Dehao Chen authored Feb 23, 2016
  f84b6300
- Revert "Add prefix based function layout when profile is available." · b3613fce
  Duncan P. N. Exon Smith authored Feb 23, 2016
  b3613fce
- AMDGPU: Add failing testcase for register coalescer · d38272b2
  Matt Arsenault authored Feb 22, 2016
  d38272b2
- More detailed dependence test between volatile and non-volatile accesses · e261e5ac
  Krzysztof Parzyszek authored Feb 22, 2016
  e261e5ac
Feb 22, 2016
- Set function entry count as 0 if sample profile is not found for the function. · 6c73b499
  Dehao Chen authored Feb 22, 2016
  6c73b499
- [X86] Create mergeable constant pool entries for AVX · 964b70d5
  David Majnemer authored Feb 22, 2016
  964b70d5
- Add prefix based function layout when profile is available. · c5f76f73
  Dehao Chen authored Feb 22, 2016
  c5f76f73
- [WebAssembly] Fix writeback of stack pointer with dynamic alloca · 27e3b8a6
  Derek Schuff authored Feb 22, 2016
  27e3b8a6
- [LoopDataPrefetch] Make it testable with opt · fb31d580
  Adam Nemet authored Feb 22, 2016
  fb31d580
- [LoopUnrolling] Fix a bug introduced in r259869 (PR26688). · d734bea8
  Michael Zolotukhin authored Feb 22, 2016
  d734bea8
- AMDGPU: Fix alignments in test · d85e5a13
  Matt Arsenault authored Feb 22, 2016
  d85e5a13
- AMDGPU/R600: Implement allowsMisalignedMemoryAccess · fa67bdbd
  Matt Arsenault authored Feb 22, 2016
  fa67bdbd
- [RS4GC] "Constant fold" the rs4gc-split-vector-values flag · ce38c2dd
  Philip Reames authored Feb 22, 2016
  ce38c2dd
- ARM: sink atomic release barrier as far as possible into cmpxchg. · d32f8e60
  Tim Northover authored Feb 22, 2016
  d32f8e60
- [RS4GC] Revert optimization attempt due to memory corruption · 79fa9b75
  Philip Reames authored Feb 22, 2016
  79fa9b75
- [WebAssembly] Teach address folding to fold bitwise-or nodes. · 3b09d279
  Dan Gohman authored Feb 22, 2016
  3b09d279
- [AMDGPU][llvm-mc] Support for 32-bit inline literals · d93a34f7
  Tom Stellard authored Feb 22, 2016
  d93a34f7
- [AMDGPU] [llvm-mc] [VI] Fix encoding of LDS/GDS instructions. · 82fc153b
  Tom Stellard authored Feb 22, 2016
  82fc153b
- Revert "[attrs] Handle convergent CallSites." · ccbd8f5a
  Justin Lebar authored Feb 22, 2016
  ccbd8f5a
- Fix for PR26690 take 2 · a8ef3c9b
  Nemanja Ivanovic authored Feb 22, 2016
  a8ef3c9b
- [attrs] Handle convergent CallSites. · 7bf9187a
  Justin Lebar authored Feb 22, 2016
  7bf9187a
- Don't tail-duplicate blocks that contain convergent instructions. · 5b82c9ba
  Justin Lebar authored Feb 22, 2016
  5b82c9ba
- [WebAssembly] Properly ignore llvm.dbg.value instructions. · 595e8ab2
  Dan Gohman authored Feb 22, 2016
  595e8ab2
- [mips] added support for trunc macro · d665a66b
  Zoran Jovanovic authored Feb 22, 2016
  d665a66b
- AVX512F: Add assembler Intel syntax tests for knl, fix minor bugs. · 252c2d96
  Igor Breger authored Feb 22, 2016
  252c2d96
- AVX512: Fix scalar mem operands. · 4511e76e
  Igor Breger authored Feb 22, 2016
  4511e76e
- Allow setting MaxRerollIterations above 16 · 9914dbd1
  Elena Demikhovsky authored Feb 22, 2016
  9914dbd1
- [X86] More test updates to support fixup-byte-word-insts optimization · 47e64abe
  Kevin B. Smith authored Feb 22, 2016
  47e64abe
Feb 21, 2016
- [X86][AVX] Add shuffle masking support for EltsFromConsecutiveLoads · e9093ada
  Simon Pilgrim authored Feb 21, 2016
  e9093ada
- Fix LLVM's handling and detection of skylake and cannonlake CPUs · aa63dc0e
  Sanjoy Das authored Feb 21, 2016
  aa63dc0e
- [InstCombine] Added SSE41 roundss/roundsd demanded vector elements invec tests · b1cc4d6d
  Simon Pilgrim authored Feb 21, 2016
  b1cc4d6d
- [InstCombine] Added XOP frczss/vfrczsd demanded vector elements tests · e2ada8d3
  Simon Pilgrim authored Feb 21, 2016
  e2ada8d3
- [InstCombine] Added SSE41 roundss/roundsd demanded vector elements tests · 2ed8686a
  Simon Pilgrim authored Feb 21, 2016
  2ed8686a
- [WebAssembly] Support physical registers in the rewrite-to-discard optimization. · 27a11eef
  Dan Gohman authored Feb 21, 2016
  27a11eef
- [X86] Use the correct alignment for COMDAT constant pool entries · a3ea407d
  David Majnemer authored Feb 21, 2016
  a3ea407d
- [InstCombine] SSE/SSE2 (u)comiss/(u)comisd comparison intrinsics only use the lowest vector element · 471efd24
  Simon Pilgrim authored Feb 20, 2016
  471efd24