Commits · da98177cda168468160912272213c695c03682d9 · Roger Ferrer / llvm-epi · GitLab

Apr 01, 2021
- [ARM] Allow v6m runtime loop unrolling · da98177c
  David Green authored Apr 01, 2021
  da98177c
- [RISCV] Use softPromoteHalf legalization for fp16 without Zfh rather than PromoteFloat. · dbbc95e3
  Craig Topper authored Apr 01, 2021
  dbbc95e3
- Update a test missed in 6ef45052 · a8ac8816
  Philip Reames authored Apr 01, 2021
  
  a8ac8816
- [Attributor] Cleanup detection of non-relaxed atomics in nosync inference · 1e69a5af
  Philip Reames authored Apr 01, 2021
  1e69a5af
- [Attributor] Cleanup intrinsic handling in nosync inference [mostly NFC] · 8e596f7e
  Philip Reames authored Apr 01, 2021
  8e596f7e
- [funcattrs] Infer nosync from readnone and non-convergent · 6ef45052
  Philip Reames authored Apr 01, 2021
  6ef45052
- Infer dereferenceability from malloc and friends · db357891
  Philip Reames authored Apr 01, 2021
  db357891
- [ARM] Remove an unused parameter in ARMWinCOFFObjectWriter. NFC. · 4391d764
  Martin Storsjö authored Mar 30, 2021
  4391d764
- Extract isVolatile helper on Instruction [NFCI] · ffa15e94
  Philip Reames authored Apr 01, 2021
  ffa15e94
- [SLP]Test for min/max reductions bug, NFC. · 432b2ab4
  Alexey Bataev authored Apr 01, 2021
  
  432b2ab4
- [MC][ARM] add .w suffixes for RSB/RSBS T1 · 52338af5
  Nick Desaulniers authored Apr 01, 2021
  52338af5
- Mark unordered memset/memmove/memcpy as nosync · 6b05d753
  Philip Reames authored Apr 01, 2021
  6b05d753
- [RISCV] Fix handling of nxvXi64 vmsgt(u).vx intrinsics on RV32. · d157e3f3
  Craig Topper authored Apr 01, 2021
  d157e3f3
- [MC][ARM] add .w suffixes for ORN/ORNS T1 · 1addc231
  Nick Desaulniers authored Apr 01, 2021
  1addc231
- [gn build] Port fdc4f19e · 4be379b1
  LLVM GN Syncbot authored Apr 01, 2021
  
  4be379b1
- [RISCV] Add custom type legalization to form MULHSU when possible. · b7c2e577
  Craig Topper authored Apr 01, 2021
  b7c2e577
- [RISCV] Add MULHU and MULHS tests with a constant operand. · dadcd940
  Craig Topper authored Apr 01, 2021
  
  dadcd940
- [AMDGPU] Remove SIAddIMGInit pass which is now unused · fdc4f19e
  Jay Foad authored Apr 01, 2021
  fdc4f19e
- [AMDGPU][GlobalISel] Add IMG init in selectImageIntrinsic · 3d07a6d8
  Jay Foad authored Mar 31, 2021
  3d07a6d8
- [AMDGPU][SDag] Add IMG init in AdjustInstrPostInstrSelection · 4af6251c
  Jay Foad authored Apr 01, 2021
  4af6251c
- [PPC] Regenerate PR27078 test checks · 0ba0a731
  Simon Pilgrim authored Apr 01, 2021
  
  0ba0a731
- [llvm-reduce] Move tests to tools folder · 0bc5436a
  Samuel authored Apr 01, 2021
  0bc5436a
- [RISCV] Improve 64-bit integer materialization for some cases. · d61b40ed
  Craig Topper authored Apr 01, 2021
  d61b40ed
- [tests] Cover the most basic cases of nosync inference · 97834378
  Philip Reames authored Apr 01, 2021
  
  97834378
- [LoopVectorize] auto-generate complete checks; NFC · 7a4abc07
  Sanjay Patel authored Apr 01, 2021
  7a4abc07
- [AMDGPU] Small cleanup to constructRetValue and its caller. NFC. · b1fbfd9e
  Jay Foad authored Apr 01, 2021
  
  b1fbfd9e
- [deref-at-point] restrict inference of dereferenceability based on allocsize attribute · e2c6621e
  Philip Reames authored Apr 01, 2021
  e2c6621e
- [regalloc] Ensure Query::collectInterferringVregs is called before interval iteration · ce61def5
  Mircea Trofin authored Mar 08, 2021
  ce61def5
- [AsmParser][SystemZ][z/OS] Add in support to accept "#" as part of an Identifier token · 7b921a67
  Anirudh Prasad authored Apr 01, 2021
  7b921a67
- [AArch64][SVE] Improve codegen for select nodes with fixed types · 2f45e632
  Bradley Smith authored Mar 25, 2021
  2f45e632
- [AArch64][SVE] SVE functions should use the SVE calling convention for fast calls · 0934fa4f
  Bradley Smith authored Mar 30, 2021
  0934fa4f
- [AMDGPU] Enable output modifiers for double precision instructions · 65c8bfb5
  Brendon Cahoon authored Mar 25, 2021
  65c8bfb5
- [SLP]Improve and fix getVectorElementSize. · c03696da
  Alexey Bataev authored Mar 30, 2021
  c03696da
- [DAG] MergeInnerShuffle with BinOps - sometimes accept undef mask elements · 77d625f8
  Simon Pilgrim authored Apr 01, 2021
  77d625f8
- [SLP]Remove `else` after `return`, NFC.` · ce98a055
  Alexey Bataev authored Apr 01, 2021
  
  ce98a055
- [AMDGPU][MC][GFX10][GFX90A] Corrected _e32/_e64 suffices · cd953434
  Dmitry Preobrazhensky authored Apr 01, 2021
  cd953434
- [X86][SSE] Fold HOP(HOP(X,X),HOP(Y,Y)) -> HOP(PERMUTE(HOP(X,Y)),PERMUTE(HOP(X,Y)) · abbe80fa
  Simon Pilgrim authored Apr 01, 2021
  abbe80fa
- [X86][SSE] Enable (F)HADD/SUB handling to SimplifyMultipleUseDemandedVectorElts · 30131984
  Simon Pilgrim authored Mar 31, 2021
  30131984
- [X86][SSE] Add isHorizOp helper function. NFCI. · f7aeaced
  Simon Pilgrim authored Mar 31, 2021
  
  f7aeaced
- [AMDGPU][MC] Added flag to identify VOP instructions which have a single variant · 0f5ebbcc
  Dmitry Preobrazhensky authored Apr 01, 2021
  0f5ebbcc