Commits · dbf910f0d95011e9485af859a10efb75bf28ee89 · Roger Ferrer / llvm-epi · GitLab

Feb 19, 2021
- [RISCV] Prevent selecting a 0 VL to X0 for the segment load/store intrinsics. · dbf910f0
  Craig Topper authored Feb 19, 2021
  dbf910f0
- [RISCV] Move SHFLI matching to DAG combine. Add 32-bit support for RV64 · 98dff5e8
  Craig Topper authored Feb 19, 2021
  98dff5e8
- [SampleFDO] Add PromotedInsns to prevent repeated ICP. · 4ffad1fb
  Wei Mi authored Feb 19, 2021
  4ffad1fb
- [AArch64][GlobalISel] Run redundant_sext_inreg in the post-legalizer combiner · 8d3442ed
  Jessica Paquette authored Feb 17, 2021
  8d3442ed
- [LV] Fold single-use variable into assert. NFC. · 59f442e6
  Benjamin Kramer authored Feb 19, 2021
  
  59f442e6
- [MemCopyOpt] Enable MemorySSA by default · 71a8e4e7
  Nikita Popov authored Jan 10, 2021
  71a8e4e7
- [SCEV] Use both known bits and sign bits when computing range of SCEV unknowns · 4a5edea1
  Philip Reames authored Feb 19, 2021
  4a5edea1
- [NFC][Regalloc] Share the VirtRegAuxInfo object with LiveRangeEdit · 82492f24
  Mircea Trofin authored Feb 17, 2021
  82492f24
- Make fixed-abi default for AMD HSA OS · 3c297a25
  madhur13490 authored Feb 10, 2021
  3c297a25
- [ARM] Correct vector predicate type in MVE getCmpSelInstrCost · a1c34a9d
  David Green authored Feb 19, 2021
  
  a1c34a9d
- [AMDGPU] Add some GFX9 test coverage. NFC. · b2c7f06d
  Jay Foad authored Feb 19, 2021
  
  b2c7f06d
- [DAG] visitTRUNCATE - attempt to truncate USUBSAT · 5d3930bb
  Simon Pilgrim authored Feb 19, 2021
  5d3930bb
- [llvm-dwarfdump][locstats] Unify handling of inlined vars with no loc · b6db47d7
  Djordje Todorovic authored Feb 08, 2021
  b6db47d7
- Revert "[ARM] Expand the range of allowed post-incs in load/store optimizer" · 7a5c26e9
  David Green authored Feb 19, 2021
  7a5c26e9
- [LV] Remove VPCallback. · edc92a1c
  Florian Hahn authored Feb 19, 2021
  edc92a1c
- [X86][SSE] Add tests for trunc(usubsat()) patterns. · c1664c5a
  Simon Pilgrim authored Feb 19, 2021
  
  c1664c5a
- [gn build] Port 1a2b3536 · 3b758095
  Nico Weber authored Feb 19, 2021
  
  3b758095
- [RISCV] Address some clang-tidy warnings. NFCI. · d9531a30
  Fraser Cormack authored Feb 19, 2021
  
  d9531a30
- [AMDGPU] WQM/WWM: Fix marking of partial definitions · 8181dcd3
  Carl Ritson authored Feb 19, 2021
  8181dcd3
- [DCE] Don't remove non-willreturn calls · 2f17ed29
  Nikita Popov authored Feb 18, 2021
  2f17ed29
- Remove unnecessary "using namespace llvm" inside "namespace llvm". NFCI. · aa44815f
  Simon Pilgrim authored Feb 19, 2021
  
  aa44815f
- [X86][AVX] getFauxShuffleMask - decode VBROADCAST(EXTRACT_VECTOR_ELT(V,0)) · 2258b367
  Simon Pilgrim authored Feb 19, 2021
  2258b367
- [IR] Move willReturn() to Instruction · 370addb9
  Nikita Popov authored Feb 18, 2021
  370addb9
- [BasicAA] Add simple depth limit to avoid stack overflow (PR49151) · 1d9f4903
  Nikita Popov authored Feb 18, 2021
  1d9f4903
- [docs] Fix the GlobalISel/GenericOpcode.rst · 0d829802
  Djordje Todorovic authored Feb 19, 2021
  0d829802
- [X86] Fix a codegen crash in getSetCCResultType · c98644c2
  Wang, Pengfei authored Feb 19, 2021
  c98644c2
- [AArch64] Add some missing Neoverse features · 260f90bb
  Sjoerd Meijer authored Feb 18, 2021
  260f90bb
- [llvm-exegesis] Ignore instructions using custom inserter · 9d2f0644
  Qiu Chaofan authored Feb 19, 2021
  9d2f0644
- [llvm-exegesis] [PowerPC] Add basic LIT test · d7d4dca1
  Qiu Chaofan authored Feb 19, 2021
  d7d4dca1
- [NPM][LTO] Do not enable MemorySSA with LoopFullUnrollPass · c141c655
  David Green authored Feb 19, 2021
  c141c655
- Reland "[Debugify] Make the debugify aware of the original (-g) Debug Info" · 1a2b3536
  Djordje Todorovic authored Feb 18, 2021
  1a2b3536
- [RISCV] Prune unneeded indexed load/store pseudo instructions. · cd4051ac
  Craig Topper authored Feb 18, 2021
  cd4051ac
- [CodeGen] Use range-based for loops (NFC) · fd04f3a3
  Kazu Hirata authored Feb 18, 2021
  
  fd04f3a3
- [Support] Use static_assert instead of assert (NFC) · 2d5eb672
  Kazu Hirata authored Feb 18, 2021
  2d5eb672
- [TableGen] Use ListSeparator (NFC) · 744a96af
  Kazu Hirata authored Feb 18, 2021
  
  744a96af
- [FPEnv][AArch64] Implement lowering of llvm.set.rounding · 2c4f60e4
  Serge Pavlov authored Feb 16, 2021
  2c4f60e4
- [ORC] Print CPU feature string in JITTargetMachineBuilder debugging output. · 0469256d
  Lang Hames authored Feb 19, 2021
  
  0469256d
- [RISCV] Remove redundant test cases for index segment store (8/8). · 0ab3558b
  Hsiangkai Wang authored Feb 19, 2021
  0ab3558b
- [RISCV] Remove redundant test cases for index segment store (7/8). · c2f27da7
  Hsiangkai Wang authored Feb 19, 2021
  c2f27da7
- [RISCV] Remove redundant test cases for index segment store (6/8). · b0168a38
  Hsiangkai Wang authored Feb 19, 2021
  b0168a38