Commits · dc969061c68e62328607d68215ed8b9ef4a1e4b1 · Roger Ferrer / llvm-epi · GitLab

Jul 05, 2022
- [SimplifyCFG] Thread all predecessors with same value at once · dc969061
  Nikita Popov authored Jul 05, 2022
  dc969061
- [LV] Remove stray dbgs() call after 774fc634 . · ebb78a95
  Florian Hahn authored Jul 05, 2022
  
  ebb78a95
- [SimplifyCFG] Add additional jump threading test (NFC) · 02ab87f5
  Nikita Popov authored Jul 05, 2022
  02ab87f5
- [NFC] Fix wrong comment. · 04c5fed5
  Thomas Symalla authored Jul 05, 2022
  
  04c5fed5
- Updating office hours · 98927062
  Alexey Bader authored Jul 05, 2022
  
  98927062
- [VE] Restructure eliminateFrameIndex · da5a6b2b
  Kazushi (Jam) Marukawa authored Jul 05, 2022
  da5a6b2b
- Revert "[VE] Restructure eliminateFrameIndex" · 9ad38e52
  Kazushi (Jam) Marukawa authored Jul 05, 2022
  9ad38e52
- [VE] Restructure eliminateFrameIndex · 98e52e8b
  Kazushi (Jam) Marukawa authored Jul 02, 2022
  98e52e8b
- [ARM] Add Support for Cortex-M85 · 1666f099
  Archibald Elliott authored Jul 05, 2022
  1666f099
- [IndVars] Precommit test with redundant FPToSI. · 271b470f
  Florian Hahn authored Jul 05, 2022
  271b470f
- [InstCombine] improve fold for icmp_eq_and to icmp_ult · b43dd2f6
  Chenbing Zheng authored Jul 05, 2022
  b43dd2f6
- [gn build] (manually) port 6b3956e1 · 220366d5
  Peter Waller authored Jul 04, 2022
  220366d5
- [InstCombine] [NFC] use C.isNegatedPowerOf2() instead of (~C + 1).isPowerOf2() · b66220f2
  Chenbing Zheng authored Jul 05, 2022
  b66220f2
- [gn build] (manually) port dfb77f2e · b6ad8cbb
  Nico Weber authored Jul 05, 2022
  
  b6ad8cbb
- [InstCombine] add negtive tests for (%x & C) == 0 -> %x u< (-C). nfc · 00cb1c33
  Chenbing Zheng authored Jul 05, 2022
  
  00cb1c33
- [AArch64][SME] Add SME addha/va intrinsics · 77b13a57
  David Sherwood authored Jun 15, 2022
  77b13a57
- [LV] Consider minimum vscale assmuption for RT check cost. · 774fc634
  Florian Hahn authored Jul 05, 2022
  774fc634
- Revert "[VectorCombine] Improve shuffle select shuffle-of-shuffles" · b69c75d5
  Nikita Popov authored Jul 05, 2022
  b69c75d5
- [RISCV] Replace an explicit check with an assert. · f2767292
  Craig Topper authored Jul 04, 2022
  f2767292
- [RISCV] Rename some variables for clarity. NFC · 66790b70
  Craig Topper authored Jul 04, 2022
  
  66790b70
- [llvm-objcopy] -O binary: align sh_offset for section changed from SHT_NOBITS · 0c01f42f
  Fangrui Song authored Jul 04, 2022
  0c01f42f
- [LoongArch] Add initial support for function calls · 3610d5f5
  wanglei authored Jul 05, 2022
  3610d5f5
- [LoongArch] Add codegen support for conditional branches · b940fe6f
  wanglei authored Jul 05, 2022
  b940fe6f
- [LoongArch] Add codegen support for load/store operations · 5b4851ed
  wanglei authored Jul 05, 2022
  5b4851ed
- [RISCV][NFC] Merge the isolated decleration into foreach. · 063500af
  Jianjian GUAN authored Jul 04, 2022
  063500af
- [InstCombine] Make use of low zero bits to determine exact int->fp cast · b2b4c872
  zhongyunde authored Jul 05, 2022
  b2b4c872
- [InstCombine] fold sub of min/max of sub with common operand · 142aca77
  Sanjay Patel authored Jul 04, 2022
  142aca77
- [InstCombine] add tests for sub of smin/smax; NFC · 8ef05327
  Sanjay Patel authored Jul 04, 2022
  8ef05327
Jul 04, 2022
- [InstCombine] add helper function for sub-of-min/max folds; NFC · 4276d00b
  Sanjay Patel authored Jul 04, 2022
  4276d00b
- [Orc][LLJIT] Use JITLink on RISC-V · a4e2c1f7
  Jonas Hahnfeld authored Jul 04, 2022
  a4e2c1f7
- [X86] Regenerate fold-tied-op.ll test checks · 623250b5
  Simon Pilgrim authored Jul 04, 2022
  
  623250b5
- [LV] Consider runtime checks profitable if scalar cost is zero. · 2a82c15f
  Florian Hahn authored Jul 04, 2022
  2a82c15f
- [LV] Add back CantReorderMemOps remark. · 9eb65727
  Florian Hahn authored Jul 04, 2022
  9eb65727
- [AArch64] Add support for insert/extract for nxv1i1 types. · 5785717e
  Sander de Smalen authored Jul 04, 2022
  5785717e
- [X86] Disable combineVectorSizedSetCCEquality for soft float. · 2bfca356
  Craig Topper authored Jul 04, 2022
  2bfca356
- [mlir][OpenMP] omp.task translation to LLVM IR · fdf505f3
  Shraiysh Vaishay authored Jul 04, 2022
  fdf505f3
- [SLP] add test for load combining + shuffling; NFC · 10ebaf76
  Sanjay Patel authored Jul 04, 2022
  10ebaf76
- [InstCombine] Avoid ConstantExpr::get() in phi binop fold · abbd684c
  Nikita Popov authored Jul 04, 2022
  abbd684c
- [Bitcode] Use bitcode input for test (NFC) · 89cb8cae
  Nikita Popov authored Jul 04, 2022
  89cb8cae
- [LTO] Update remark test after 644a965c . · 8471c686
  Florian Hahn authored Jul 04, 2022
  
  8471c686