Commits · ddd056c9847793d1b56c0cbe8fce1264a012a7e2 · Roger Ferrer / llvm-epi · GitLab

Jun 21, 2019
- [MIPS GlobalISel] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds after D63541 · ddd056c9
  Fangrui Song authored Jun 21, 2019
  ddd056c9
Jun 20, 2019
- AMDGPU: Always use s33 for global scratch wave offset · d88db6d7
  Matt Arsenault authored Jun 20, 2019
  d88db6d7
- [ARM GlobalISel] Add support for s64 G_ADD and G_SUB. · 25f08a17
  Eli Friedman authored Jun 20, 2019
  25f08a17
- [PowerPC][NFC] Fix comments for AltVSXFMARel mapping. · 8b1abe56
  Jinsong Ji authored Jun 20, 2019
  8b1abe56
- AMDGPU: Add intrinsics for DS GWS semaphore instructions · 740322f1
  Matt Arsenault authored Jun 20, 2019
  740322f1
- AMDGPU: Insert mem_viol check loop around GWS pre-GFX9 · 8ad1decf
  Matt Arsenault authored Jun 20, 2019
  8ad1decf
- [X86] Add BLSI to isUseDefConvertible. · 9e1665f2
  Craig Topper authored Jun 20, 2019
  9e1665f2
- AMDGPU: Fix ignoring DisableFramePointerElim in leaf functions · 5dc457cb
  Matt Arsenault authored Jun 20, 2019
  5dc457cb
- AMDGPU: Treat undef as an inline immediate · b7f87c0e
  Matt Arsenault authored Jun 20, 2019
  b7f87c0e
- [ARM] Add a batch of MVE integer instructions. · 232db110
  Simon Tatham authored Jun 20, 2019
  232db110
- [AMDGPU] gfx1010 core wave32 changes · 0846c125
  Stanislav Mekhanoshin authored Jun 20, 2019
  0846c125
- [X86] LowerAVXExtend - handle ANY_EXTEND_VECTOR_INREG lowering as well. · a4d705e0
  Simon Pilgrim authored Jun 20, 2019
  a4d705e0
- [MIPS GlobalISel] Select integer to floating point conversions · 153bd24e
  Petar Avramovic authored Jun 20, 2019
  153bd24e
- [MIPS GlobalISel] Select floating point to integer conversions · 4b4dae1c
  Petar Avramovic authored Jun 20, 2019
  4b4dae1c
- [X86] Remove memory instructions form isUseDefConvertible. · b4ea6457
  Craig Topper authored Jun 20, 2019
  b4ea6457
- [X86] Add v64i8/v32i16 to several places in X86CallingConv.td where they seemed obviously missing. · 451f7feb
  Craig Topper authored Jun 20, 2019
  451f7feb
- AMDGPU: Don't clobber VCC in MUBUF addr64 emulation · c67c484f
  Matt Arsenault authored Jun 20, 2019
  c67c484f
- [llvm-objdump] Switch between ARM/Thumb based on mapping symbols. · d88e28d1
  Eli Friedman authored Jun 20, 2019
  d88e28d1
- AMDGPU: Consolidate some getGeneration checks · e4c2e9b0
  Matt Arsenault authored Jun 19, 2019
  e4c2e9b0
- AMDGPU: Undo sub x, c canonicalization for v2i16 · e24b34e9
  Matt Arsenault authored Jun 19, 2019
  e24b34e9
- [mips] Mark the `lwupc` instruction as MIPS64 R6 only · f61c43c6
  Simon Atanasyan authored Jun 19, 2019
  f61c43c6
- [mips] Add (GPR|PTR)_64 predicates to PseudoReturn64 and PseudoIndirectHazardBranch64 · 01214326
  Simon Atanasyan authored Jun 19, 2019
  01214326
Jun 19, 2019
- AMDGPU: Fix folding immediate into readfirstlane through reg_sequence · 4d000d24
  Matt Arsenault authored Jun 19, 2019
  4d000d24
- hwasan: Shrink outlined checks by 1 instruction. · 2742eeb7
  Peter Collingbourne authored Jun 19, 2019
  2742eeb7
- Reapply "AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsics" · 4d55d024
  Matt Arsenault authored Jun 19, 2019
  4d55d024
- [x86] avoid vector load narrowing with extracted store uses (PR42305) · b5640b6f
  Sanjay Patel authored Jun 19, 2019
  b5640b6f
- [X86][SSE] combineToExtendVectorInReg - add ANY_EXTEND support TODO. NFCI. · 0018b78e
  Simon Pilgrim authored Jun 19, 2019
  0018b78e
- [X86][SSE] Combine shuffles to ANY_EXTEND/ANY_EXTEND_VECTOR_INREG. · 34279db3
  Simon Pilgrim authored Jun 19, 2019
  34279db3
- [ARM] Add MVE vector bit-operations (register inputs). · 2f5188fd
  Simon Tatham authored Jun 19, 2019
  2f5188fd
- [AVR] Change limit type to match the argument type (NFC) · 567f6c15
  Evandro Menezes authored Jun 19, 2019
  567f6c15
- [Hexagon] Change limit type to match the argument type (NFC) · 56c45e93
  Evandro Menezes authored Jun 19, 2019
  56c45e93
- [X86] getExtendInVec - take a ISD::*_EXTEND opcode instead of a IsSigned bool flag. NFCI. · cdc0236e
  Simon Pilgrim authored Jun 19, 2019
  cdc0236e
- [X86] Add *_EXTEND -> *_EXTEND_VECTOR_INREG opcode conversion helper. NFCI. · d4754cac
  Simon Pilgrim authored Jun 19, 2019
  d4754cac
- [X86] Merge extract_subvector(*_EXTEND) and... · 2b309027
  Simon Pilgrim authored Jun 19, 2019
  2b309027
- [SystemZ] Support vector load/store alignment hints · 3641b10f
  Ulrich Weigand authored Jun 19, 2019
  3641b10f
- Revert rL363678 : AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsics · 128ce93c
  Simon Pilgrim authored Jun 19, 2019
  128ce93c
- [RISCV] Allow parsing immediates that use tilde & exclaim · 18737e81
  Lewis Revill authored Jun 19, 2019
  18737e81
- [RISCV] Fix failure to parse parenthesized immediates · 218aa0ed
  Lewis Revill authored Jun 19, 2019
  218aa0ed
- [X86] Add missing properties on llvm.x86.sse.{st,ld}mxcsr · 4ef7c286
  Clement Courbet authored Jun 19, 2019
  4ef7c286
- [RISCV] Add lowering of global TLS addresses · 39263ac5
  Lewis Revill authored Jun 19, 2019
  39263ac5