Commits · e06290e53f2880962fef582f118482d70f1c27f0 · Roger Ferrer / llvm-epi · GitLab

Apr 21, 2022
- AMDGPU/GlobalISel: Fix isVCC for uniform s1 with reg class on wave32 · e06290e5
  Petar Avramovic authored Apr 21, 2022
  e06290e5
- [AArch64] Add `foldOverflowCheck` DAG combine · 81904454
  Karl Meakin authored Apr 21, 2022
  81904454
- [AArch64] Add lowerings for {ADD,SUB}CARRY and S{ADD,SUB}O_CARRY · 13403a70
  Karl Meakin authored Apr 21, 2022
  13403a70
- [InstCombine] Remove dead code (NFC) · 46c2b41d
  Nikita Popov authored Apr 21, 2022
  46c2b41d
- [AMDGPU]: Fix failing assertion in SIMachineScheduler · 607f8ced
  Jannik Silvanus authored Apr 21, 2022
  607f8ced
- [Debugify] Limit number of processed functions for original mode · c5600aef
  Nikola Tesic authored Apr 21, 2022
  c5600aef
- [AMDGPU][MC][NFC][GFX940] Corrected an error position · 81af32b9
  Dmitry Preobrazhensky authored Apr 21, 2022
  81af32b9
- [BOLT] Add R_AARCH64_PREL16/32/64 relocations support · 48e894a5
  Alexey Moksyakov authored Apr 21, 2022
  48e894a5
- [AMDGPU][GFX90A+] Disabled ds_ordered_count and exp · b4231ac4
  Dmitry Preobrazhensky authored Apr 21, 2022
  b4231ac4
- [SimplifyCFG] Handle branch on same condition in pred more directly · 3df86e79
  Nikita Popov authored Apr 20, 2022
  3df86e79
- [SimplifyCFG] Make FoldCondBranchOnPHI more amenable to extension · 89882546
  Nikita Popov authored Apr 20, 2022
  89882546
- Force insert zero-idiom and break false dependency of dest register for several instructions. · 3e6b904f
  gpei-dev authored Apr 19, 2022
  3e6b904f
- Revert "[RISCV] Do not outline CFI instructions when they are needed in EH" · ce838836
  Pengcheng Wang authored Apr 21, 2022
  ce838836
- [RISCV] Do not outline CFI instructions when they are needed in EH · 0d406889
  Pengcheng Wang authored Apr 21, 2022
  0d406889
- [NFC] Code cleanups for coroutine after we remvoed legacy passes · 7eaa84ea
  Chuanqi Xu authored Apr 21, 2022
  
  7eaa84ea
- [RISCV] Don't emit fractional VIDs with negative steps · 3e678cb7
  Fraser Cormack authored Apr 19, 2022
  3e678cb7
- [RISCV] Make getInstSeqCost handle other Zb* instructions. · 186d5c8a
  Craig Topper authored Apr 20, 2022
  186d5c8a
- [Pipelines] Remove Legacy Passes in Coroutines · 483efc9a
  Chuanqi Xu authored Apr 21, 2022
  483efc9a
- [AMDGPU] On gfx908, reserve VGPR for AGPR copy based on register budget. · 5bd87350
  hsmahesha authored Apr 21, 2022
  5bd87350
- [LoongArch] Add basic floating-point instructions definition · 3a49ad71
  Weining Lu authored Mar 29, 2022
  3a49ad71
Apr 20, 2022
- [Hexagon] Establish size limit for RegisterSet in hexbit · 16c93aaa
  Krzysztof Parzyszek authored Apr 20, 2022
  16c93aaa
- Reland "[COFF, ARM64] Add __break intrinsic" · 38612fbc
  Pengxuan Zheng authored Apr 15, 2022
  38612fbc
- Revert "[COFF, ARM64] Add __break intrinsic" · bff8356b
  Pengxuan Zheng authored Apr 20, 2022
  bff8356b
- [AMDGPU] Remove obsolete hack from allowsMisalignedMemoryAccesses. NFCI. · aa14e2ef
  Stanislav Mekhanoshin authored Apr 19, 2022
  aa14e2ef
- [VPlan] Initial modeling of middle block in VPlan. · bea69b23
  Florian Hahn authored Apr 20, 2022
  bea69b23
- [safestack] Support safestack in stack size diagnostics · 61e36e87
  Paul Kirth authored Apr 19, 2022
  61e36e87
- [COFF, ARM64] Add __break intrinsic · 8a9b4fb4
  Pengxuan Zheng authored Apr 15, 2022
  8a9b4fb4
- [DAG]Introduce llvm::processShuffleMasks and use it for shuffles in DAG Type Legalizer. · 2cca53c8
  Alexey Bataev authored Dec 13, 2021
  2cca53c8
- [InstCombine] Don't look through bitcast from vector in collectInsertionElements. · e3f6c2d2
  Craig Topper authored Apr 20, 2022
  e3f6c2d2
- [InstCombine] Fold mul nuw+lshr to a single multiplication when the latter is a factor · 1fae4b49
  chenglin.bi authored Apr 20, 2022
  1fae4b49
- [InstCombine] remove likely redundant ValueTracking-based folds for shifts · bf09a925
  Sanjay Patel authored Apr 20, 2022
  bf09a925
- MachineModuleInfo: Move AddrLabelSymbols to AsmPrinter · 9209a519
  Matt Arsenault authored Apr 17, 2022
  9209a519
- MachineModuleInfo: Remove UsesMorestackAddr · 3659780d
  Matt Arsenault authored Apr 17, 2022
  3659780d
- MachineModuleInfo: Move HasSplitStack handling to AsmPrinter · d7938b1a
  Matt Arsenault authored Apr 17, 2022
  d7938b1a
- [SimplifyCFG] Remove one-use limitation in FoldCondBranchOnPHI() · d727505e
  Nikita Popov authored Apr 20, 2022
  d727505e
- [AMDGPU] Fix crash in SIOptimizeExecMaskingPreRA · 879ac410
  Jay Foad authored Mar 30, 2022
  879ac410
- Revert "[DAG]Introduce llvm::processShuffleMasks and use it for shuffles in DAG Type Legalizer." · 5f7ac159
  Alexey Bataev authored Apr 20, 2022
  5f7ac159
- LocalStackSlotAllocation: Combine debug printing statements · 26d575eb
  Matt Arsenault authored Apr 20, 2022
  
  26d575eb
- LocalStackSlotAllocation: Stop creating unused virtual register · 4575f35e
  Matt Arsenault authored Apr 20, 2022
  
  4575f35e
- [DAG]Introduce llvm::processShuffleMasks and use it for shuffles in DAG Type Legalizer. · 2f49163b
  Alexey Bataev authored Dec 13, 2021
  2f49163b