Commits · e5101e2016311c315119c8ad50a970b6b0c87cc7 · Roger Ferrer / llvm-epi · GitLab

Aug 10, 2015
- MachineVerifier: Handle the optional def operand in a PATCHPOINT instruction. · e5101e20
  Alex Lorenz authored Aug 10, 2015
  e5101e20
- [llvm-symbolizer] Remove underscores and other C mangling on Windows · c25c7944
  Reid Kleckner authored Aug 10, 2015
  c25c7944
- StackMap: FastISel: Add an appropriate number of immediate operands to the · 2f43dd5a
  Alex Lorenz authored Aug 10, 2015
  2f43dd5a
- Make fp vectorization test X86 specified to avoid cost-model related problems... · 655e573d
  Tyler Nowicki authored Aug 10, 2015
  655e573d
- Add a test showing that objdump (and so ObjectFIle) can handle shndx. · 3db22738
  Rafael Espindola authored Aug 10, 2015
  3db22738
- x86: Emit LAHF/SAHF instead of PUSHF/POPF · fa9746dc
  JF Bastien authored Aug 10, 2015
  fa9746dc
- fix minsize detection: minsize attribute implies optimizing for size · d09391c8
  Sanjay Patel authored Aug 10, 2015
  d09391c8
- [x86, SSE]]add missing tests for load folding with partial register update · 178f8cba
  Sanjay Patel authored Aug 10, 2015
  178f8cba
- [InstCombine] Move SSE2/AVX2 arithmetic vector shift folding to instcombiner · a3a72b41
  Simon Pilgrim authored Aug 10, 2015
  a3a72b41
- Fix a few more cases of 'CHECK[^:]*$'. NFCI · f45295c3
  Jon Roelofs authored Aug 10, 2015
  f45295c3
- Late evaluation of the fast-math vectorization requirement. · c1a86f58
  Tyler Nowicki authored Aug 10, 2015
  c1a86f58
- Fix another case of 'CHECK[^:]*$'. NFCI · 5dcf1574
  Jon Roelofs authored Aug 10, 2015
  5dcf1574
- Modify diagnostic messages to clearly indicate the why interleaving wasn't done. · 4d62f2e0
  Tyler Nowicki authored Aug 10, 2015
  4d62f2e0
- [Sparc] Implement i64 load/store support for 32-bit sparc. · 3994be87
  James Y Knight authored Aug 10, 2015
  3994be87
- Fix a bunch of trivial cases of 'CHECK[^:]*$' in the tests. NFCI · 49e46ce8
  Jon Roelofs authored Aug 10, 2015
  49e46ce8
- Add new llvm.loop.unroll.enable metadata. · 8939154a
  Mark Heffernan authored Aug 10, 2015
  8939154a
- fix minsize detection: minsize attribute implies optimizing for size · 10294b59
  Sanjay Patel authored Aug 10, 2015
  10294b59
- fix minsize detection: minsize attribute implies optimizing for size · 0f12d71b
  Sanjay Patel authored Aug 10, 2015
  0f12d71b
- fix minsize detection: minsize attribute implies optimizing for size · 68b0325a
  Sanjay Patel authored Aug 10, 2015
  68b0325a
- fix minsize detection: minsize attribute implies optimizing for size · 9a9003d9
  Sanjay Patel authored Aug 10, 2015
  9a9003d9
- Prevent the scalarizer from caching incorrect entries · e29ab2bf
  Fraser Cormack authored Aug 10, 2015
  e29ab2bf
- Trace copies when checking for rematerializability in spill weight calculation · 11a44b78
  Robert Lougher authored Aug 10, 2015
  11a44b78
Aug 09, 2015
- [PHITransAddr] Don't assume that instruction operands are translatable · 4232fb3f
  David Majnemer authored Aug 09, 2015
  4232fb3f
Aug 08, 2015
- [x86] enable machine combiner reassociations for 128-bit vector single/double adds · e0178262
  Sanjay Patel authored Aug 08, 2015
  e0178262
- add a missing regression test for a DAGCombiner FDIV optimization · 0f51d149
  Sanjay Patel authored Aug 07, 2015
  0f51d149
- AMDGPU: Add pass to lower OpenCL image and sampler arguments. · fd25395c
  Tom Stellard authored Aug 07, 2015
  fd25395c
- [SPARC] Disable unsupported ExecutionEngine tests, and XFAIL a couple · 0cab80c9
  James Y Knight authored Aug 07, 2015
  0cab80c9
- AMDGPU/SI: Use InstAlias instead of MnemonicAlias for VOPC instructions · 8ebad11e
  Tom Stellard authored Aug 07, 2015
  8ebad11e
Aug 07, 2015
- redo r244360 (tighten checks...) after specifying triple · 8d768b5b
  Sanjay Patel authored Aug 07, 2015
  8d768b5b
- tighten checks using update_llc_test_checks.py · 0e1d7316
  Sanjay Patel authored Aug 07, 2015
  0e1d7316
- MIR Serialization: Serialize the base alignment for the machine memory operands. · 61420f79
  Alex Lorenz authored Aug 07, 2015
  61420f79
- MIR Serialization: Serialize the offsets for the machine memory operands. · 83127739
  Alex Lorenz authored Aug 07, 2015
  83127739
- AMDGPU: Assume SMRD access for constant address space · 711b390a
  Matt Arsenault authored Aug 07, 2015
  711b390a
- [ConstantFoldTerminator] Preserve make.implicit metadata when converting SwitchInst to BranchInst · eafbc9dc
  Chen Li authored Aug 07, 2015
  eafbc9dc
- [InstCombine] Fix SSE2/AVX2 vector logical shift by constant · 3815c16b
  Simon Pilgrim authored Aug 07, 2015
  3815c16b
- AMDGPU/SI: Use correct encoding of vopc for VI in the assembler · c8733e80
  Tom Stellard authored Aug 07, 2015
  c8733e80
- AMDGPU/SI: Add VI checks to vop3 assembler tests · d37631a8
  Tom Stellard authored Aug 07, 2015
  d37631a8
- add missing tests files · f7eb8821
  Rafael Espindola authored Aug 07, 2015
  f7eb8821
- Add dynamic_table iterators back to ELF.h. · e01f43bc
  Rafael Espindola authored Aug 07, 2015
  e01f43bc
- [dsymutil] Use the new MCDwarfLineTableParams customization to emit linetables · a5e1453a
  Frederic Riss authored Aug 07, 2015
  a5e1453a