Commits · e5101e2016311c315119c8ad50a970b6b0c87cc7 · Roger Ferrer / llvm-epi · GitLab

Aug 10, 2015
- MachineVerifier: Handle the optional def operand in a PATCHPOINT instruction. · e5101e20
  Alex Lorenz authored Aug 10, 2015
  e5101e20
- StackMap: FastISel: Add an appropriate number of immediate operands to the · 2f43dd5a
  Alex Lorenz authored Aug 10, 2015
  2f43dd5a
- x86: Emit LAHF/SAHF instead of PUSHF/POPF · fa9746dc
  JF Bastien authored Aug 10, 2015
  fa9746dc
- fix minsize detection: minsize attribute implies optimizing for size · d09391c8
  Sanjay Patel authored Aug 10, 2015
  d09391c8
- [x86, SSE]]add missing tests for load folding with partial register update · 178f8cba
  Sanjay Patel authored Aug 10, 2015
  178f8cba
- [InstCombine] Move SSE2/AVX2 arithmetic vector shift folding to instcombiner · a3a72b41
  Simon Pilgrim authored Aug 10, 2015
  a3a72b41
- Fix a few more cases of 'CHECK[^:]*$'. NFCI · f45295c3
  Jon Roelofs authored Aug 10, 2015
  f45295c3
- [Sparc] Implement i64 load/store support for 32-bit sparc. · 3994be87
  James Y Knight authored Aug 10, 2015
  3994be87
- Fix a bunch of trivial cases of 'CHECK[^:]*$' in the tests. NFCI · 49e46ce8
  Jon Roelofs authored Aug 10, 2015
  49e46ce8
- fix minsize detection: minsize attribute implies optimizing for size · 10294b59
  Sanjay Patel authored Aug 10, 2015
  10294b59
- fix minsize detection: minsize attribute implies optimizing for size · 0f12d71b
  Sanjay Patel authored Aug 10, 2015
  0f12d71b
- fix minsize detection: minsize attribute implies optimizing for size · 68b0325a
  Sanjay Patel authored Aug 10, 2015
  68b0325a
- fix minsize detection: minsize attribute implies optimizing for size · 9a9003d9
  Sanjay Patel authored Aug 10, 2015
  9a9003d9
- Trace copies when checking for rematerializability in spill weight calculation · 11a44b78
  Robert Lougher authored Aug 10, 2015
  11a44b78
Aug 08, 2015
- [x86] enable machine combiner reassociations for 128-bit vector single/double adds · e0178262
  Sanjay Patel authored Aug 08, 2015
  e0178262
- add a missing regression test for a DAGCombiner FDIV optimization · 0f51d149
  Sanjay Patel authored Aug 07, 2015
  0f51d149
- AMDGPU: Add pass to lower OpenCL image and sampler arguments. · fd25395c
  Tom Stellard authored Aug 07, 2015
  fd25395c
Aug 07, 2015
- redo r244360 (tighten checks...) after specifying triple · 8d768b5b
  Sanjay Patel authored Aug 07, 2015
  8d768b5b
- tighten checks using update_llc_test_checks.py · 0e1d7316
  Sanjay Patel authored Aug 07, 2015
  0e1d7316
- MIR Serialization: Serialize the base alignment for the machine memory operands. · 61420f79
  Alex Lorenz authored Aug 07, 2015
  61420f79
- MIR Serialization: Serialize the offsets for the machine memory operands. · 83127739
  Alex Lorenz authored Aug 07, 2015
  83127739
- AMDGPU: Assume SMRD access for constant address space · 711b390a
  Matt Arsenault authored Aug 07, 2015
  711b390a
- [ARM] Update ReconstructShuffle to handle mismatched types · 3e8e51c1
  Silviu Baranga authored Aug 07, 2015
  3e8e51c1
- Revert "Make global aliases have symbol size equal to their type" · 64e5a667
  John Brawn authored Aug 07, 2015
  64e5a667
- WebAssembly: textual emission uses expected opcode names · 315cc068
  JF Bastien authored Aug 07, 2015
  315cc068
- MIR Serialization: Fix serialization of unnamed IR block references. · cba8c5fe
  Alex Lorenz authored Aug 06, 2015
  cba8c5fe
- [AArch64][FastISel] Always use AND before checking the branch flag. · f09c7a3d
  Juergen Ributzka authored Aug 06, 2015
  f09c7a3d
- Revert "[AArch64][FastISel] Add more truncation tests." and... · 9f54dbe7
  Juergen Ributzka authored Aug 06, 2015
  9f54dbe7
Aug 06, 2015
- AMDGPU/SI: Add support for 32-bit immediate SMRD offsets on CI · 217361c3
  Tom Stellard authored Aug 06, 2015
  217361c3
- AMDGPU/SI: Use ComplexPatterns for SMRD addressing modes · dee26a28
  Tom Stellard authored Aug 06, 2015
  dee26a28
- Fix possible infinite loop in shrink wrapping when searching for save/restore · a7bf96ab
  Kit Barton authored Aug 06, 2015
  a7bf96ab
- MIR Parser: Report an error when parsing duplicate memory operand flags. · e86d5153
  Alex Lorenz authored Aug 06, 2015
  e86d5153
- MIR Serialization: Serialize the 'invariant' machine memory operand flag. · dc8de2a6
  Alex Lorenz authored Aug 06, 2015
  dc8de2a6
- MIR Serialization: Serialize the 'non-temporal' machine memory operand flag. · 10fd0385
  Alex Lorenz authored Aug 06, 2015
  10fd0385
- [X86] Improve EmitLoweredSelect for contiguous CMOV pseudo instructions. · 868dc654
  Michael Kuperstein authored Aug 06, 2015
  868dc654
- MIR Serialization: Initial serialization of the machine operand target flags. · 49873a83
  Alex Lorenz authored Aug 06, 2015
  49873a83
- [NVPTX] Use LDG for pointer induction variables. · 5cbc7d29
  Bjarke Hammersholt Roune authored Aug 05, 2015
  5cbc7d29
- Fix Windows test failure with triple instead of using the native OS · 10cac7a1
  Reid Kleckner authored Aug 05, 2015
  10cac7a1
- MIR Serialization: Serialize the machine operand's offset. · 5672a893
  Alex Lorenz authored Aug 05, 2015
  5672a893
Aug 05, 2015
- x86 atomic: optimize a.store(reg op a.load(acquire), release) · 86620837
  JF Bastien authored Aug 05, 2015
  86620837