Commits · e9600d861cf898b51c33218ea55a924292ba7955 · Roger Ferrer / llvm-epi · GitLab

Feb 08, 2017
- GlobalISel: select G_VASTART on iOS AArch64. · e9600d86
  Tim Northover authored Feb 08, 2017
  e9600d86
- GlobalISel: translate @llvm.va_start intrinsic. · f19d467f
  Tim Northover authored Feb 08, 2017
  f19d467f
- [x86] add AVX512vl target for more coverage; NFC · 28ef27e3
  Sanjay Patel authored Feb 08, 2017
  28ef27e3
- Add test case for pr31890. NFC · 887117fb
  Amaury Sechet authored Feb 08, 2017
  887117fb
- Fix test to work on swift/cyclone too · e79e5ee2
  Diana Picus authored Feb 08, 2017
  e79e5ee2
- [AMDGPU] Add target information that is required by tools to metadata · 9f89ede1
  Konstantin Zhuravlyov authored Feb 08, 2017
  9f89ede1
- [ARM] GlobalISel: Add FPR reg bank · 4fa83c03
  Diana Picus authored Feb 08, 2017
  4fa83c03
- [AArch64][TableGen] Skip tied result operands for InstAlias · fecdb36f
  Amara Emerson authored Feb 08, 2017
  fecdb36f
- [AVR] XFAIL a set of failing CodeGen tests · db370bd6
  Dylan McKay authored Feb 08, 2017
  db370bd6
- AMDGPU: Enable InferAddressSpaces · 417e0072
  Matt Arsenault authored Feb 08, 2017
  417e0072
- [X86] Add test for clflushopt intrinsic and only enable it to be selected if... · 3fd463a1
  Craig Topper authored Feb 08, 2017
  3fd463a1
- [DAGCombiner] Push truncate through adde when the carry isn't used. · 4b946916
  Amaury Sechet authored Feb 08, 2017
  4b946916
Feb 07, 2017
- [X86][SSE] Add SSE2 build vector insertion tests · 39c138cc
  Simon Pilgrim authored Feb 07, 2017
  39c138cc
- [X86][SSE] Add additional v4i32/v8i16/v16i8 build vector insertion tests · 90ee0b27
  Simon Pilgrim authored Feb 07, 2017
  90ee0b27
- [X86] Disable conditional tail calls (PR31257) · 819e3e02
  Hans Wennborg authored Feb 07, 2017
  819e3e02
- GlobalISel: translate @llvm.va_end intrinsic. · d0d025ae
  Tim Northover authored Feb 07, 2017
  d0d025ae
- [ImplicitNullCheck] Extend Implicit Null Check scope by using stores · 2f63cbcc
  Sanjoy Das authored Feb 07, 2017
  2f63cbcc
- [PowerPC][Altivec] Add vnot extended mnemonic · 17aeb5a2
  Nemanja Ivanovic authored Feb 07, 2017
  17aeb5a2
- [AMDGPU] Fix for SIMachineScheduler crash. SI Scheduler should track · a3dace36
  Alexander Timofeev authored Feb 07, 2017
  a3dace36
- [Hexagon] Remove encoding bits from mapped instructions · c8d676ef
  Krzysztof Parzyszek authored Feb 07, 2017
  c8d676ef
- Add DAGCombiner load combine tests for {a|s}ext, {a|z|s}ext load nodes · 469596ef
  Artur Pilipenko authored Feb 07, 2017
  469596ef
- [X86][SSE] Generalized integer absolute tests to test canonical pattern as well as intrinsics · b4a9eeaf
  Simon Pilgrim authored Feb 07, 2017
  b4a9eeaf
- [ARM] Make RWPI use movw/movt when available · d3ed8380
  Christof Douma authored Feb 07, 2017
  d3ed8380
- [X86][SSE] Added 256-bit vector tests cases · d48b23c2
  Simon Pilgrim authored Feb 07, 2017
  d48b23c2
- Revert "[DAGCombiner] (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)" · 84b3cc39
  Daniel Jasper authored Feb 07, 2017
  84b3cc39
- [AVX-512] Add masked and unmasked shift by immediate instructions to load folding tables. · 9191c332
  Craig Topper authored Feb 07, 2017
  9191c332
- [AVX-512] Add masked shift instructions to load folding tables. · 62304d80
  Craig Topper authored Feb 07, 2017
  62304d80
- [AVX-512] Add some of the shift instructions to the load folding tables. · 45d9ddc6
  Craig Topper authored Feb 07, 2017
  45d9ddc6
- [X86] Change the Defs list for VZEROALL/VZEROUPPER back to not including YMM16-31. · 39d86bb6
  Craig Topper authored Feb 07, 2017
  39d86bb6
- [AVX-512] Put the integer stack folding tests in alphabetical order. · 190314ce
  Craig Topper authored Feb 07, 2017
  190314ce
- RegisterCoalescer: Fix joinReservedPhysReg() · f80403d8
  Matthias Braun authored Feb 07, 2017
  f80403d8
- [AMDGPU] Lower null pointers in static variable initializer · 8f844f39
  Yaxun Liu authored Feb 07, 2017
  8f844f39
- [x86] add tests to show current codegen for vblendv*; NFC · cbcef570
  Sanjay Patel authored Feb 07, 2017
  cbcef570
- GlobalISel: legalize narrow G_SELECTS on AArch64. · 868332d6
  Tim Northover authored Feb 06, 2017
  868332d6
- [Hexagon] Adding gp+ to the syntax of gp-relative instructions · 5b4a6b67
  Krzysztof Parzyszek authored Feb 06, 2017
  5b4a6b67
Feb 06, 2017
- [X86][SSE] Tests showing the lowering of float/double complex multiplications... · a93c7738
  Simon Pilgrim authored Feb 06, 2017
  a93c7738
- GlobalISel: fall back gracefully when we can't map an operand's size. · 6f2db57d
  Tim Northover authored Feb 06, 2017
  6f2db57d
- GlobalISel: legalize G_INSERT instructions · 0e6afbdd
  Tim Northover authored Feb 06, 2017
  0e6afbdd
- [X86][SSE] Add tests showing missed opportunities to simplify integer absolute instructions · 5b2fd59e
  Simon Pilgrim authored Feb 06, 2017
  5b2fd59e
- [AArch64] Fix incorrect MachinePointerInfo in splitStoreSplat · 3a9c842a
  John Brawn authored Feb 06, 2017
  3a9c842a