Commits · ea3683e98f107622ce54fa3d4c1457f4d597f808 · Roger Ferrer / llvm-epi · GitLab

Jul 18, 2023
- [RISCV] Improve type promotion for i32 clmulr/clmulh on RV64. · ea3683e9
  Craig Topper authored Jul 18, 2023
  ea3683e9
- [DAG] SimplifyDemandedBits - attempt to use SimplifyMultipleUseDemandedBits... · d7eb9240
  Simon Pilgrim authored Jul 18, 2023
  d7eb9240
- [RISCV] Use RISCVISD::CZERO_EQZ/CZERO_NEZ for XVentanaCondOps. · 0c055286
  Craig Topper authored Jul 18, 2023
  0c055286
- [RISCV] Add test coverage for peephole vmerge optimization of unmasked rvv... · ca724573
  eopXD authored Jul 18, 2023
  ca724573
- [RISCV] Do not use FPR registers for fastcc if zfh/f/d is not specified in the architecture · eb89bf8d
  eopXD authored Jul 17, 2023
  eb89bf8d
- [RISCV] Add isMoveReg to vmv1r/vmv2r/vmv4r/vmv8r.v. · cdee88a2
  Craig Topper authored Jul 18, 2023
  cdee88a2
- [RISCV] Test for D155140. NFC · 7767297b
  Craig Topper authored Jul 18, 2023
  7767297b
- [AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre · b0093e13
  Zhuojia Shen authored Jun 23, 2023
  b0093e13
- [AArch64] Add tests for merging LDRSWpre-LDR pairs · 94f76004
  Zhuojia Shen authored Jun 23, 2023
  94f76004
- [DAG] More aggressively (extract_vector_elt (build_vector x, y), c) iff element is zero constant · 3ad4f92f
  Simon Pilgrim authored Jul 18, 2023
  3ad4f92f
- [Sparc] Regenerate float-constants.ll test checks · b8bda509
  Simon Pilgrim authored Jul 18, 2023
  
  b8bda509
- [AArch64] Regenerate a couple of vector-shuffle tests. NFC · fe22b905
  Dinar Temirbulatov authored Jul 18, 2023
  fe22b905
- Revert "[AArch64] Fix an immediate out of range for large realignments on Windows" · 793a349e
  Martin Storsjö authored Jul 18, 2023
  793a349e
- [SLP]Include cost of the reshuffling for same nodes with resizing. · 83ba148a
  Alexey Bataev authored May 05, 2023
  83ba148a
- [ARM] Replace TransferImpOps with copyImplicitOps · 343e204a
  John Brawn authored Jul 14, 2023
  343e204a
- [AArch64] Fix an immediate out of range for large realignments on Windows · b1d0bc0f
  Martin Storsjö authored Jul 17, 2023
  b1d0bc0f
- [RISCV] Add VP patterns for vandn.[vv,vx] · 5eb71914
  Luke Lau authored Jul 17, 2023
  5eb71914
- [RISCV] Add SDNode patterns for vandn.[vv,vx] · 26ff4c67
  Luke Lau authored Jul 17, 2023
  26ff4c67
- [InstCombine] Allow KnownBits to be propagated · eb5d7987
  Paulo Matos authored Jul 17, 2023
  eb5d7987
- AMDGPU: Preserve flags in fdiv_fast lowering · c28e09c8
  Matt Arsenault authored Jul 16, 2023
  c28e09c8
- AMDGPU: Generate and add fdiv tests · 4a81283b
  Matt Arsenault authored Jul 16, 2023
  4a81283b
- ValueTracking: Fix computeKnownFPClass canonicalize handling · f868c22b
  Matt Arsenault authored Jul 16, 2023
  f868c22b
- ValueTracking: Add more tests for canonicalize class handling · 00f9c6fc
  Matt Arsenault authored Jul 16, 2023
  
  00f9c6fc
- AMDGPU: Add some additional rcp/rsq tests · cdfdfe7c
  Matt Arsenault authored Jul 15, 2023
  
  cdfdfe7c
- [AArch64] Force streaming-compatible codegen when attributes are set. · 08fd44b3
  Sander de Smalen authored Jul 18, 2023
  08fd44b3
- MachineSink: Fix sinking VGPR def out of a divergent loop · 3f8ef57b
  Matt Arsenault authored Jul 14, 2023
  3f8ef57b
- AMDGPU: Add baseline test for broken machine sinking · d5ab3795
  Matt Arsenault authored Jul 14, 2023
  
  d5ab3795
- [LV] Move all VPlan transforms after initial VPlan construction. · 68746a8c
  Florian Hahn authored Jul 18, 2023
  68746a8c
- Revert "Revert "Revert "[MemCpyOpt] implement single BB stack-move... · 8f3864ba
  khei4 authored Jul 18, 2023
  8f3864ba
- [LowerMatrixIntrinsics] Fix test expectations (NFC) · bc39a7a5
  Nikita Popov authored Jul 18, 2023
  bc39a7a5
- [LowerMatrixIntrinsics] Use poison instead of undef as placeholder [NFC] · 23c21759
  Nuno Lopes authored Jul 18, 2023
  23c21759
- Reapply [InstSimplify] Make simplifyWithOpReplaced() recursive (PR63104) · 0db5d8e1
  Nikita Popov authored Jul 13, 2023
  0db5d8e1
- [InstSimplify] Add additional tests for with op replaced fold (NFC) · 96d68693
  Nikita Popov authored Jul 18, 2023
  
  96d68693
- [AArch64] Regenerate a couple of mir GlobalISel tests. NFC · 4214f156
  David Green authored Jul 18, 2023
  4214f156
- [RISCV] Lower VP_CTLZ_ZERO_UNDEF/VP_CTTZ_ZERO_UNDEF/VP_CTLZ by converting to... · 65ffcc09
  LiaoChunyu authored Jul 18, 2023
  65ffcc09
- [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns · 4c42ab11
  Konstantina Mitropoulou authored Jun 15, 2023
  4c42ab11
- [NFC] Tests for future commit in DAGCombiner · 11cd92a7
  Konstantina Mitropoulou authored Jun 21, 2023
  11cd92a7
- AMDGPU: Fix broken denormal constant folding of canonicalize · 04185f0b
  Matt Arsenault authored Jul 16, 2023
  04185f0b
- AMDGPU: Use hex floats instead of ugly bitcasting · bd2dca0f
  Matt Arsenault authored Jul 15, 2023
  
  bd2dca0f
- Revert "[llvm-reduce] Reduce function calling convention" · 53abf2d5
  Arthur Eubanks authored Jul 17, 2023
  53abf2d5