Commits · ee8aa351e43f27e1dd4240560a3e054ca045186f · Roger Ferrer / llvm-epi · GitLab

May 16, 2022
- [AArch64] Use ADDV for boolean xor reductions. · ee8aa351
  Paul Walker authored May 14, 2022
  ee8aa351
- [InstrProf] Fix promoter when using counter relocations · 9a90ea1f
  Ellis Hoag authored May 16, 2022
  9a90ea1f
- [AIX] llvm-link support big archive. · c38ef550
  zhijian authored May 16, 2022
  c38ef550
- [AIX] fixed llvm-ar can not read empty big archive correctly. · 52c61555
  zhijian authored May 16, 2022
  52c61555
- [AMDGPU] Revert wide LDS DMA support. · 332b73fe
  Stanislav Mekhanoshin authored May 11, 2022
  332b73fe
- [llvm-objdump] Let --symbolize-operands symbolize basic block addresses based... · 5f7ef652
  Rahman Lavaee authored May 13, 2022
  5f7ef652
- [AArch64] Predicate SSHLL;SCVTF patterns behind UseAlternateSExtLoadCVTF32 · 5d29d752
  David Green authored May 16, 2022
  5d29d752
- [InstCombine] invert canonicalization for cast of signbit test · 3794cc0e
  Sanjay Patel authored May 16, 2022
  3794cc0e
- [InstCombine] add tests for zext-of-signbit test; NFC · 836305b2
  Sanjay Patel authored May 16, 2022
  
  836305b2
- [AArch64][ARM][RISCV][X86] Add test cases for PR55484. NFC · 74f6ded4
  Craig Topper authored May 16, 2022
  74f6ded4
- [TargetLowering] Expand the last stage of i16 popcnt using shift+add+and instead of mul+shift. · 1c4880a2
  Craig Topper authored May 16, 2022
  1c4880a2
- [llvm-profgen] Update callsite body samples by summing up all call target samples. · acfd0a34
  Hongtao Yu authored May 12, 2022
  acfd0a34
- [AArch64] Update check lines in arm64-scvt.ll. NFC · 7272a8c2
  David Green authored May 16, 2022
  
  7272a8c2
- [PhaseOrdering] add tests for cmp + boolean/bitwise logic; NFC · 325896d8
  Sanjay Patel authored May 16, 2022
  325896d8
- [InstCombine] fix test name; NFC · 242910ac
  Sanjay Patel authored May 16, 2022
  242910ac
- [SLP]Check if the root of the buildvector has one use only. · 15207280
  Alexey Bataev authored May 16, 2022
  15207280
- [ValueTracking] Handle and/or on RHS of isImpliedCondition() · 356d47cc
  Nikita Popov authored May 13, 2022
  356d47cc
- [LAA,LV] Add initial support for pointer-diff memory checks. · b7315ffc
  Florian Hahn authored May 16, 2022
  b7315ffc
- [AMDGPU] Shrink MAD/FMA to MADAK/MADMK/FMAAK/FMAMK on GFX10 · 27fa4158
  Jay Foad authored Feb 18, 2022
  27fa4158
- [AMDGPU] gfx11 BUF Instructions · c7025940
  Joe Nash authored Apr 19, 2022
  c7025940
- [InstCombine] Combine instructions of type or/and where AND masks can be combined. · ec4adf1f
  Biplob Mishra authored May 16, 2022
  ec4adf1f
- [DAGCombine] Support splat_vector nodes in (and (extload)) dagcombine · 7ff5148d
  Bradley Smith authored May 10, 2022
  7ff5148d
- AArch64: support ISel for fence instructions · 1ddc6ab1
  Tim Northover authored May 16, 2022
  1ddc6ab1
- [GlobalISel] Handle constant splat in funnel shift combine · 485dd0b7
  Abinav Puthan Purayil authored May 12, 2022
  485dd0b7
- [AMDGPU][GlobalISel] Pre-commit tests for D125516 · f96d2045
  Abinav Puthan Purayil authored May 13, 2022
  f96d2045
- [X86][AVX] Add test showing poor expansion of bit-reversal permutation shuffles · fab5c853
  Simon Pilgrim authored May 16, 2022
  fab5c853
- [AArch64] Handle 64bit vectors in tryCombineFixedPointConvert · 4c3e51ec
  David Green authored May 16, 2022
  4c3e51ec
- [StatepointLowering] Properly handle local and non-local relocates of the same value. · 8903dbef
  Denis Antrushin authored May 13, 2022
  8903dbef
- [llvm-c] Add functions for enabling and creating opaque pointers · 436bbce7
  Nicolas Abram Lujan authored May 16, 2022
  436bbce7
- [ControlHeightReduction] Freeze condition when converting select to branch · 7ba48466
  Nikita Popov authored May 10, 2022
  7ba48466
- [FastISel] Fix load folding for registers with fixups · 05c3fe07
  Nikita Popov authored May 12, 2022
  05c3fe07
- [LoopVectorize] Permit tail-folding for low trip counts using scalable vectors · befc9520
  David Sherwood authored Mar 10, 2022
  befc9520
- [Mips] Implement hasDivRemOp() · 0a0d6489
  Jim Lin authored May 16, 2022
  0a0d6489
- [DivRemPairs][Mips] Pre-commit test for Mips target · 49b0c605
  Jim Lin authored May 16, 2022
  49b0c605
- [RISCV] Fix incorrect use of tail agnostic vslideup. · 1878f240
  Zakk Chen authored May 15, 2022
  1878f240
May 15, 2022
- [LV] Set SCEVCheckCond to nullptr whenever it was used. · 8b7c3d21
  Florian Hahn authored May 15, 2022
  8b7c3d21
- [X86] Adjust fadd costs to match SoG · 896557e1
  Simon Pilgrim authored May 15, 2022
  896557e1
- [RISCV] Add M extension command lines to ctlz-cttz-ctpop.ll. NFC · d0312a5c
  Craig Topper authored May 14, 2022
  d0312a5c
- [RISCV] Improve test coverage in ctlz-cttz-ctpop.ll. NFC · c748d2cd
  Craig Topper authored May 14, 2022
  c748d2cd
- [X86] Add test coverage for PR44915 / Issue #44260 · 6bf8133f
  Simon Pilgrim authored May 15, 2022
  
  6bf8133f