Commits · f487a76430a0e79d017519328e808b812f8186ad · Roger Ferrer / llvm-epi · GitLab

Jan 26, 2022
- [RISCV] Add hasStdExtZbp() to hasAndNotCompare. · f487a764
  Craig Topper authored Jan 26, 2022
  
  f487a764
- [DAG] Create fptoui.sat from clamped fptoui · 57356d6b
  David Green authored Jan 26, 2022
  57356d6b
- [RISCV] Add the passthru operand for RVV nomask load intrinsics. · 9273378b
  Zakk Chen authored Jan 25, 2022
  9273378b
Jan 25, 2022
- [RISCV] Don't allow i64 vector div by constant to use mulh with Zve64x · b089e407
  eopXD authored Jan 22, 2022
  b089e407
- [SelectionDAG][VP] Add widening support for VP_MERGE · 7cb452bf
  Fraser Cormack authored Jan 24, 2022
  7cb452bf
- [VP] Update CodeGen/RISCV/rvv/vpgather-sdnode.ll test · 19d3dc6e
  Victor Perez authored Jan 25, 2022
  
  19d3dc6e
- [SelectionDAG][VP] Add splitting support for VP_MERGE · 5f5c5603
  Fraser Cormack authored Jan 24, 2022
  5f5c5603
- [LegalizeTypes][VP] Add splitting support for vp.gather and vp.scatter · 2233befa
  Victor Perez authored Jan 25, 2022
  2233befa
Jan 24, 2022
- [DAGCombiner][RISCV] Canonicalize (bswap(bitreverse(x))->bitreverse(bswap(x)). · a43ed49f
  Craig Topper authored Jan 24, 2022
  a43ed49f
- [SelectionDAG][RISCV] Teach getNode to fold bswap(bswap(x))->x. · b8c7cdcc
  Craig Topper authored Jan 24, 2022
  b8c7cdcc
- [RISCV] Select int_riscv_vsll with shift of 1 to vadd.vv. · cd2a9ff3
  Craig Topper authored Jan 24, 2022
  cd2a9ff3
- [RISCV] Add side-effect-free vsetvli intrinsics · d42678b4
  Fraser Cormack authored Jan 21, 2022
  d42678b4
- [RISCV] add support for zbkx subextension in MC layer. · 70f83f30
  SForeKeeper authored Jan 24, 2022
  70f83f30
- [RISCV][VP] Lower VP_MERGE to RVV instructions · af773a18
  Fraser Cormack authored Jan 18, 2022
  af773a18
- [RISCV] Match VF variants for masked VFRDIV/VFRSUB · e7926e8d
  Fraser Cormack authored Jan 20, 2022
  e7926e8d
- [RISCV] Add patterns of SET[U]LT_VI for STECC forms · 9aaa74ae
  Chenbing.Zheng authored Jan 24, 2022
  9aaa74ae
- [RISCV] Decouple Zve* extensions and the V extension. · ba16e3c3
  Jianjian GUAN authored Jan 21, 2022
  ba16e3c3
- [RISCV] Initially support the K-extension instructions on the LLVM MC layer · e29d8fb1
  Wu Xinlong authored Jan 24, 2022
  e29d8fb1
Jan 23, 2022
- [RISCV] Add tests that do a bitreverse before or after a bswap. NFC · 3575700b
  Craig Topper authored Jan 23, 2022
  3575700b
- [RISCV] Add bitreverse tests to bswap-ctlz-cttz-ctpop.ll. Add Zbb command lines. NFC · 88f33cff
  Craig Topper authored Jan 23, 2022
  88f33cff
- [RISCV] Merge some rvv intrinsic test cases that only differ by XLen type. · 0b799791
  Craig Topper authored Jan 22, 2022
  0b799791
- [RISCV] Use FP ABI for some RVV intrinsic tests. NFC · be6070c2
  Craig Topper authored Jan 22, 2022
  be6070c2
- [RISCV] Merge some rvv intrinsic test cases that only differ by XLen type. · 85e42db1
  Craig Topper authored Jan 22, 2022
  85e42db1
- [RISCV] Remove experimental prefix from rvv-related extensions. · 3cf15af2
  eopXD authored Jan 21, 2022
  3cf15af2
Jan 22, 2022
- [RISCV][RFC] add MC support for zbkc subextension · e796eaf2
  Alex Fan authored Jan 21, 2022
  e796eaf2
Jan 21, 2022
- [RISCV] Enable CGP to sink splat operands of VP intrinsics · 4d268dc9
  Fraser Cormack authored Jan 19, 2022
  4d268dc9
- [RISCV] Bump rvv-related extensions from 0.10 to 1.0 · e6de53b4
  eopXD authored Jan 20, 2022
  e6de53b4
- [RISCV] Set CostPerUse to 1 iff RVC is enabled · 8def89b5
  Pengcheng Wang authored Jan 21, 2022
  8def89b5
- [RISCV] Add isel patterns for grevi, shfli, and unshfli to brev8/zip/unzip instructions. · 7b3d3072
  Craig Topper authored Jan 20, 2022
  7b3d3072
- [RISCV][RFC] add inst support of zbkb · 7ee1c162
  Wu Xinlong authored Jan 20, 2022
  7ee1c162
- [RISCV] Fix the bug in the register allocator caused by reserved BP. · ad06e65d
  Hsiangkai Wang authored Jan 19, 2022
  ad06e65d
- [RISCV] Factor Zve32 support into RISCVSubtarget::getMaxELENForFixedLengthVectors. · cfae2c65
  Craig Topper authored Jan 20, 2022
  cfae2c65
Jan 20, 2022
- [RISCV] Optimize vector_shuffles that are interleaving the lowest elements of two vectors. · fa8bb224
  Craig Topper authored Jan 20, 2022
  fa8bb224
- [RISCV] Remove Zvlsseg extension. · 7a275dc3
  Craig Topper authored Jan 20, 2022
  7a275dc3
- [RISCV] Add DAG combine to fold (fp_to_int_sat (ffloor X)) -> (select X == nan, 0, (fcvt X, rdn)) · 94e69fbb
  Craig Topper authored Jan 20, 2022
  94e69fbb
- [RISCV] Add tests for commuted vector/scalar VP patterns · 75017db0
  Fraser Cormack authored Jan 20, 2022
  75017db0
- [RISCV] Match RVV VF variants also through masked operations · ca36cc56
  Fraser Cormack authored Jan 19, 2022
  ca36cc56
- [RISCV] Optimize lowering of floating-point -0.0 · 5a12024b
  Fraser Cormack authored Jan 19, 2022
  5a12024b
- [LegalizeTypes][VP] Add widening support for vp.gather and vp.scatter · c10c7488
  Victor Perez authored Jan 20, 2022
  c10c7488
- [RISCV] Add intrinsic for Zbt extension · 0be3da1f
  Chenbing.Zheng authored Jan 20, 2022
  0be3da1f