- Mar 31, 2020
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Florian Hahn authored
This is a speculative fix to silence the spurious C4129 warning that some version of MSVC generate for the raw string literals in the changed files. Before disabling the warning (D76428), try a potential fix suggested in the review.
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Kai Wang authored
Leverage ARM ELF build attribute section to create ELF attribute section for RISC-V. Extract the common part of parsing logic for this section into ELFAttributeParser.[cpp|h] and ELFAttributes.[cpp|h]. Differential Revision: https://reviews.llvm.org/D74023
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Wei Mi authored
Compbinary format uses MD5 to represent strings in name table. That gives smaller profile without the need of compression/decompression when writing/reading the profile. The patch adds the support in extbinary format. It is off by default but user can choose to enable it. Note the feature of using MD5 in name table can bring very small chance of name conflict leading to profile mismatch. Besides, profile using the feature won't have the profile remapping support. Differential Revision: https://reviews.llvm.org/D76255
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- Mar 30, 2020
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Francesco Petrogalli authored
Reviewers: sdesmalen Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D76738
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Jonas Devlieghere authored
Extend the FileCollector's API with addDirectory which adds a directory and its contents to the VFS mapping. Differential revision: https://reviews.llvm.org/D76671
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Sam Clegg authored
Also add a test case to wasm-ld that asserts without this change. Internally wasm-ld builds a StringMap of exported functions and it seems like allowing empty string in the set is preferable to adding checks. This assert looks like it was most likely just a historical accident. It started life here purely to support InputLanguagesSet: eeac27e3 Then got extracted here: e57a4033 Then got moved to AST here 5c48bae2 With the `InLang` paramater name still intact which suggested is InputLanguagesSet origins. Differential Revision: https://reviews.llvm.org/D74589
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Guillaume Chatelet authored
Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: jyknight, sdardis, nemanjai, hiraditya, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, jfb, PkmX, jocewei, Jim, lenary, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D77059
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Sam Parker authored
Add a bit more logic into the 'FalseLaneZeros' tracking to enable horizontal reductions and also make the VADDV variants validForTailPredication. Differential Revision: https://reviews.llvm.org/D76708
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- Mar 29, 2020
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Benjamin Kramer authored
This allows emitting it only when the feature is used by a target. Shrinks Release+Asserts clang by 900k.
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Uday Bondhugula authored
Aligned_alloc is a standard lib function and has been in glibc since 2.16 and in the C11 standard. It has semantics similar to malloc/calloc for several analyses/transforms. This patch introduces aligned_alloc in target library info and memory builtins. Subsequent ones will make other passes aware and fix https://bugs.llvm.org/show_bug.cgi?id=44062 This change will also be useful to LLVM generators that need to allocate buffers of vector elements larger than 16 bytes (for eg. 256-bit ones), element boundary alignment for which is not typically provided by glibc malloc. Signed-off-by:
Uday Bondhugula <uday@polymagelabs.com> Differential Revision: https://reviews.llvm.org/D76970
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Matt Arsenault authored
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Florian Hahn authored
This patch changes VPWidenRecipe to only store a single original IR instruction. This is the first required step towards modeling it's operands as VPValues and also towards breaking it up into a VPInstruction. Discussed as part of D74695. Reviewers: Ayal, gilr, rengolin Reviewed By: gilr Differential Revision: https://reviews.llvm.org/D76988
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- Mar 28, 2020
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Jonas Devlieghere authored
This reverts commit 8913769e because the unit test is failing on the Windows bot.
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Jonas Devlieghere authored
Extend the FileCollector's API with addDirectory which adds a directory and its contents to the VFS mapping. Differential revision: https://reviews.llvm.org/D76671
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David Blaikie authored
Without this some instances of copy construction would use the converting constructor & lead to the destination function_ref referring to the source function_ref instead of the underlying functor. Discovered in feedback from 857bf5da Thanks to Johannes Doerfert, Arthur O'Dwyer, and Richard Smith for the discussion and debugging.
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- Mar 27, 2020
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Jonas Devlieghere authored
The current implementation of the JSONWriter does not support writing out directory entries. Earlier today I added a unit test to illustrate the problem. When an entry is added to the YAMLVFSWriter and the path is a directory, it will incorrectly emit the directory as a file, and any files inside that directory will not be found by the VFS. It's possible to partially work around the issue by only adding "leaf nodes" (files) to the YAMLVFSWriter. However, this doesn't work for representing empty directories. This is a problem for clients of the VFS that want to iterate over a directory. The directory not being there is not the same as the directory being empty. This is not just a hypothetical problem. The FileCollector for example does not differentiate between file and directory paths. I temporarily worked around the issue for LLDB by ignoring directories, but I suspect this will prove problematic sooner rather than later. This patch fixes the issue by extending the JSONWriter to support writing out directory entries. We store whether an entry should be emitted as a file or directory. Differential revision: https://reviews.llvm.org/D76670
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Lang Hames authored
This flag can be used to mark a symbol as existing only for the purpose of enabling materialization. Such a symbol can be looked up to trigger materialization with the lookup returning only once materialization is complete. Symbols with this flag will never resolve however (to avoid permanently polluting the symbol table), and should only be looked up using the SymbolLookupFlags::WeaklyReferencedSymbol flag. The primary use case for this flag is initialization symbols.
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Lang Hames authored
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Sam Parker authored
Add a flag for those instructions which read from the top/bottom halves of their inputs and produce a vector of results with double width elements. Differential Revision: https://reviews.llvm.org/D76762
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Cyndy Ishida authored
* applies only to tests
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- Mar 26, 2020
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Scott Linder authored
Summary: The PC_32 DWARF register is for a 32-bit process address space which we don't implement in AMDGCN; another way of putting this is that the size of the PC register is not a function of the wavefront size. If we ever implement a 32-bit process address space we will need to add two more DwarfFlavours i.e. we will need to represent the product of (wave32, wave64) x (64-bit address space, 32-bit address space). Tags: #llvm Differential Revision: https://reviews.llvm.org/D76732
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Dominik Montada authored
Summary: The existing helper function can only create a libcall to functions available in RTLIB. Add a helper function that can create a libcall to a given function name using the provided calling convention. Reviewers: aditya_nandakumar, t.p.northover, rovka, arsenm, dsanders Reviewed By: arsenm Subscribers: wdng, hiraditya, volkan, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D76845
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Ties Stuij authored
Summary: This patch introduces command-line support for the Armv8.6-a architecture and assembly support for BFloat16. Details can be found https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a in addition to the GCC patch for the 8..6-a CLI: https://gcc.gnu.org/legacy-ml/gcc-patches/2019-11/msg02647.html In detail this patch - march options for armv8.6-a - BFloat16 assembly This is part of a patch series, starting with command-line and Bfloat16 assembly support. The subsequent patches will upstream intrinsics support for BFloat16, followed by Matrix Multiplication and the remaining Virtualization features of the armv8.6-a architecture. Based on work by: - labrinea - MarkMurrayARM - Luke Cheeseman - Javed Asbar - Mikhail Maltsev - Luke Geeson Reviewers: SjoerdMeijer, craig.topper, rjmccall, jfb, LukeGeeson Reviewed By: SjoerdMeijer Subscribers: stuij, kristof.beyls, hiraditya, dexonsmith, danielkiss, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D76062
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- Mar 25, 2020
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Alina Sbirlea authored
Summary: Rename `succ_const_iterator` to `const_succ_iterator` and `succ_const_range` to `const_succ_range` for consistency with the predecessor iterators, and the corresponding iterators in MachineBasicBlock. Reviewers: nicholas, dblaikie, nlewycky Subscribers: hiraditya, bmahjour, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D75952
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Alexander Belyaev authored
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Tyker authored
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Sam Parker authored
Add a target flag for instructions that reduce into one, or more, scalar reg(s), including variants of: - VADDV - VABAV - VMINV/VMAXV - VMLADAV Differential Revision: https://reviews.llvm.org/D76683
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Matt Arsenault authored
For some operations, the type is unimportant and only the number of bits matters. For example I don't want to treat <4 x s8> as a legal type, but I also don't want to decompose loads of this into smaller pieces to get legal register types. On AMDGPU in SelectionDAG, we legalize a number of operations (most notably load and store) by coercing all types to vectors of i32. For GlobalISel, I'm trying very hard to avoid doing this for every type, but I don't think this strategy can be completely avoided. I'm trying to avoid bitcasts for any legitimately legal type we can operate on, since the intervening bitcasts have proven to be a hassle. For loads, I think I can get away without ever casting the result type, and handling any arbitrary bitwidth during selection (I will eventually want new tablegen support to help with this, rather than having to add every possible type as legal). The unmerge required to do anything with the value should expand to the expected shifts. This is trickier for stores, since it would now require handling a wide array of truncates during selection which I don't want. Future potentially interesting case are for vector indexing, where sub-dword type should be indexed in s32 pieces.
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- Mar 24, 2020
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Johannes Doerfert authored
This patch integrates operand bundle llvm.assumes [0] with the Attributor. Most IRAttributes will now look at uses of the associated value and if there are llvm.assume operand bundle uses with the right tag we will check if they are in the must-be-executed-context (around the context instruction). Droppable users, which is currently only llvm::assume, are handled special in some places now as well. [0] http://lists.llvm.org/pipermail/llvm-dev/2019-December/137632.html Reviewed By: uenoku Differential Revision: https://reviews.llvm.org/D74888
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Florian Hahn authored
The initial implementation just delegates to APInt's implementation of XOR for single element ranges and conservatively returns the full set otherwise. Reviewers: nikic, spatel, lebedev.ri Reviewed By: nikic Differential Revision: https://reviews.llvm.org/D76453
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Sam Parker authored
Add a flag, 'RetainsPreviousHalfElement', for operations that operate on top/bottom halves of their input and only write to half of their destination, leaving the other half to retain its previous value. Differential Revision: https://reviews.llvm.org/D76608
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John McCall authored
The algorithm supports both assigning a fixed offset to a field prior to layout and allowing fields to have sizes that aren't multiples of their required alignments. This means that the well-known algorithm of sorting by decreasing alignment isn't always good enough. Still, we start with that, and only if that leaves padding around do we fall back on a greedy padding-minimizing algorithm. There is no known efficient algorithm for producing a guaranteed-minimal layout in all cases. In fact, allowing arbitrary fixed-offset fields means there's a straightforward reduction from bin-packing, making this NP-hard. But as usual with such problems, we can still efficiently produce adequate solutions to the cases that matter most to us. I intend to use this in coroutine frame layout, where the retcon lowerings very badly want to minimize total space usage, and where the switch lowering can indeed produce a header with interior padding if the promise field is highly-aligned. But it may be useful in a much wider variety of situations.
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Jonas Devlieghere authored
Add a unit test for vfs::YAMLVFSWriter. This patch exposes an issue in the writer: when we call addFileMapping with a directory, the VFS writer will emit it as a regular file, causing any of the nested files or directories to not be found.
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- Mar 23, 2020
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Matt Arsenault authored
Since intrinsics can now specify when an argument is required to be constant, it is now OK to replace arguments with variables if they aren't. This means intrinsics must now be accurately marked with immarg.
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Eli Friedman authored
The only reason we export symbols from these tools is to support plugins; if we don't have plugins, exporting symbols just bloats the executable and makes LTO less effective. See review of D75879 for the discussion that led to this patch. Differential Revision: https://reviews.llvm.org/D76527
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Matt Arsenault authored
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Matt Arsenault authored
Currently all GlobalISel unittests use a hardcoded AArch64 target machine. Factor this so I can write some for AMDGPU specific known bits unittests.
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Fangrui Song authored
[CMake] Fix AMDGPUTests -DBUILD_SHARED_LIBS=on builds and trim dependencies of AMDGPUTests and AMDDwarfTests after D76357/G24698e526f619271705fe72bcaa928be9bc82484 FAILED: unittests/Target/AMDGPU/AMDGPUTests ... ld.lld: error: undefined symbol: llvm::MCRegisterInfo::getLLVMRegNum(unsigned int, bool) const >>> referenced by DwarfRegMappings.cpp:60 (/usr/local/google/home/maskray/llvm/llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp:60) >>> unittests/Target/AMDGPU/CMakeFiles/AMDGPUTests.dir/DwarfRegMappings.cpp.o:(AMDGPUDwarfRegMappingTests_TestWave64DwarfRegMapping_Test::TestBody()) >>> referenced by DwarfRegMappings.cpp:82 (/usr/local/google/home/maskray/llvm/llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp:82) >>> unittests/Target/AMDGPU/CMakeFiles/AMDGPUTests.dir/DwarfRegMappings.cpp.o:(AMDGPUDwarfRegMappingTests_TestWave32DwarfRegMapping_Test::TestBody()) A -DBUILD_SHARED_LIBS=off build is good because AMDGPUCodeGen pulls in MC. A -DBUILD_SHARED_LIBS=on build requires all direct dependencies (MC) to be listed becuase llvm/cmake/modules/HandleLLVMOptions.cmake uses -Wl,-z,defs
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Alexandre Ganea authored
warning: comparison of integers of different signs: 'const unsigned long long' and 'const int' [-Wsign-compare]
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Ram Nalamothu authored
Fixes the build failures introduced by 24698e52
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