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  1. Jul 10, 2018
    • Florian Hahn's avatar
      [VPlan] Add VPlanTestBase.h with helper class to build VPlan for tests. · 8263975c
      Florian Hahn authored
      Reviewers: dcaballe, hsaito, rengolin
      
      Reviewed By: dcaballe
      
      Differential Revision: https://reviews.llvm.org/D49032
      
      llvm-svn: 336653
      8263975c
    • Simon Pilgrim's avatar
      Fix MSVC "signed/unsigned mismatch" warning. NFCI. · c048599f
      Simon Pilgrim authored
      llvm-svn: 336649
      c048599f
    • Chandler Carruth's avatar
      [PM/Unswitch] Fix unused variable in r336646. · 148861f5
      Chandler Carruth authored
      llvm-svn: 336647
      148861f5
    • Chandler Carruth's avatar
      [PM/Unswitch] Fix a collection of closely related issues with trivial · 47dc3a34
      Chandler Carruth authored
      switch unswitching.
      
      The core problem was that the way we handled unswitching trivial exit
      edges through the default successor of a switch. For some reason
      I thought the right way to do this was to add a block containing
      unreachable and point the default successor at this block. In
      retrospect, this has an amazing number of problems.
      
      The first issue is the one that this pass has always worked around -- we
      have to *detect* such edges and avoid unswitching them again. This
      seemed pretty easy really. You juts look for an edge to a block
      containing unreachable. However, this pattern is woefully unsound. So
      many things can break it. The amazing thing is that I found a test case
      where *simple-loop-unswitch itself* breaks this! When we do
      a *non-trivial* unswitch of a switch we will end up splitting this exit
      edge. The result will be a default successor that is an exit and
      terminates in ... a perfectly normal branch. So the first test case that
      I started trying to fix is added to the nontrivial test cases. This is
      a ridiculous example that did just amazing things previously. With just
      unswitch, it would create 10+ copies of this stuff stamped out. But if
      you combine it *just right* with a bunch of other passes (like
      simplify-cfg, loop rotate, and some LICM) you can get it to do this
      infinitely. Or at least, I never got it to finish. =[
      
      This, in turn, uncovered another related issue. When we are manipulating
      these switches after doing a trivial unswitch we never correctly updated
      PHI nodes to reflect our edits. As soon as I started changing how these
      edges were managed, it became obvious there were more issues that
      I couldn't realistically leave unaddressed, so I wrote more test cases
      around PHI updates here and ensured all of that works now.
      
      And this, in turn, required some adjustment to how we collect and manage
      the exit successor when it is the default successor. That showed a clear
      bug where we failed to include it in our search for the outer-most loop
      reached by an unswitched exit edge. This was actually already tested and
      the test case didn't work. I (wrongly) thought that was due to SCEV
      failing to analyze the switch. In fact, it was just a simple bug in the
      code that skipped the default successor. While changing this, I handled
      it correctly and have updated the test to reflect that we now get
      precise SCEV analysis of trip counts for the outer loop in one of these
      cases.
      
      llvm-svn: 336646
      47dc3a34
    • Mikhail Dvoretckii's avatar
      [X86] Fast-isel tests for lowered truncation intrinsics · 89c919c2
      Mikhail Dvoretckii authored
      This patch adds fast-isel tests for the IR patterns produced for truncation
      intrinsics in rC336643.
      
      Differential Revision: https://reviews.llvm.org/D48822
      
      llvm-svn: 336645
      89c919c2
    • Simon Pilgrim's avatar
      [X86][SSE] Prefer BLEND(SHL(v,c1),SHL(v,c2)) over MUL(v, c3) · d32ca2c0
      Simon Pilgrim authored
      Now that rL336250 has landed, we should prefer 2 immediate shifts + a shuffle blend over performing a multiply. Despite the increase in instructions, this is quicker (especially for slow v4i32 multiplies), avoid loads and constant pool usage. It does mean however that we increase register pressure. The code size will go up a little but by less than what we save on the constant pool data.
      
      This patch also adds support for v16i16 to the BLEND(SHIFT(v,c1),SHIFT(v,c2)) combine, and also prevents blending on pre-SSE41 shifts if it would introduce extra blend masks/constant pool usage.
      
      Differential Revision: https://reviews.llvm.org/D48936
      
      llvm-svn: 336642
      d32ca2c0
    • Craig Topper's avatar
      [X86] Regenerate vector-shuffle-512-v8.ll so the script will merge the 32 and... · 5fd020c0
      Craig Topper authored
      [X86] Regenerate vector-shuffle-512-v8.ll so the script will merge the 32 and 64 bit checks together. NFC
      
      llvm-svn: 336641
      5fd020c0
    • Craig Topper's avatar
      [X86] Use IsProfitableToFold to block vinsertf128rm in favor of insert_subreg... · 08b81a55
      Craig Topper authored
      [X86] Use IsProfitableToFold to block vinsertf128rm in favor of insert_subreg instead of artifically increasing pattern complexity to give priority.
      
      This is a much more direct way to solve the issue than just giving extra priority.
      
      llvm-svn: 336639
      08b81a55
    • Craig Topper's avatar
      [X86] Remove some seemingly unnecessary patterns. · db73f564
      Craig Topper authored
      We're missing the EVEX equivalents of these patterns and seem to get along fine.
      
      I think we end up with X86vzload for the obvious IR cases that would produce this DAG.
      
      llvm-svn: 336638
      db73f564
    • Craig Topper's avatar
      [X86] Add back GCCBuiltin on mask_div_ss/sd_round. · 3e7406b4
      Craig Topper authored
      We no longer need custom handling in clang.
      
      llvm-svn: 336627
      3e7406b4
    • Craig Topper's avatar
      [X86] Correct vfixupimm load patterns to look for an integer load, not a... · 866a377e
      Craig Topper authored
      [X86] Correct vfixupimm load patterns to look for an integer load, not a floating point load bitcasted to integer.
      
      DAG combine wouldn't let a floating point load bitcasted to integer exist. It would just be an integer load.
      
      llvm-svn: 336626
      866a377e
    • Craig Topper's avatar
      [X86] Add test cases that show failure to fold load into vfixupimm... · 59fd2f4c
      Craig Topper authored
      [X86] Add test cases that show failure to fold load into vfixupimm instructions due to bad isel pattern.
      
      llvm-svn: 336625
      59fd2f4c
    • Craig Topper's avatar
      [X86] Remove FloatVT from X86VectorVTInfo in X86InstrAVX512.td · e4f46e4f
      Craig Topper authored
      The only places it was used where places where VT was the same as FloatVT. So switch those uses to VT and drop it.
      
      llvm-svn: 336624
      e4f46e4f
    • Vlad Tsyrklevich's avatar
      Revert "AMDGPU: Force inlining if LDS global address is used" · 688e7522
      Vlad Tsyrklevich authored
      This reverts commit r336587, it was causing test failures on the
      sanitizer bots.
      
      llvm-svn: 336623
      688e7522
    • Wolfgang Pieb's avatar
      [DWARF][NFC] Refactor range list emission to use a static helper · e194f73e
      Wolfgang Pieb authored
      This is prep for DWARF v5 range list emission. Emission of a single range list is moved
      to a static helper function.
      
      Reviewer: jdevlieghere
      
      Differential Revision: https://reviews.llvm.org/D49098
      
      llvm-svn: 336621
      e194f73e
    • Sanjay Patel's avatar
      [InstCombine] allow more shuffle folds using safe constants · 69faf464
      Sanjay Patel authored
      getSafeVectorConstantForBinop() was calling getBinOpIdentity() assuming
      that the constant we wanted was operand 1 (RHS). That's wrong, but I
      don't think we could expose a bug or even a suboptimal fold from that
      because the callers have other guards for any binop that would have
      been affected.
      
      llvm-svn: 336617
      69faf464
    • Heejin Ahn's avatar
      [WebAssembly] Support for binary atomic RMW instructions · fed7382e
      Heejin Ahn authored
      Summary:
      This adds support for binary atomic read-modify-write instructions:
      add, sub, and, or, xor, and xchg.
      
      This does not yet support translations of some of LLVM IR atomicrmw
      instructions (nand, max, min, umax, and umin) that do not have a direct
      counterpart in wasm instructions.
      
      Reviewers: dschuff
      
      Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
      
      Differential Revision: https://reviews.llvm.org/D49088
      
      llvm-svn: 336615
      fed7382e
    • Manoj Gupta's avatar
      llvm: Add support for "-fno-delete-null-pointer-checks" · 77eeac3d
      Manoj Gupta authored
      Summary:
      Support for this option is needed for building Linux kernel.
      This is a very frequently requested feature by kernel developers.
      
      More details : https://lkml.org/lkml/2018/4/4/601
      
      GCC option description for -fdelete-null-pointer-checks:
      This Assume that programs cannot safely dereference null pointers,
      and that no code or data element resides at address zero.
      
      -fno-delete-null-pointer-checks is the inverse of this implying that
      null pointer dereferencing is not undefined.
      
      This feature is implemented in LLVM IR in this CL as the function attribute
      "null-pointer-is-valid"="true" in IR (Under review at D47894).
      The CL updates several passes that assumed null pointer dereferencing is
      undefined to not optimize when the "null-pointer-is-valid"="true"
      attribute is present.
      
      Reviewers: t.p.northover, efriedma, jyknight, chandlerc, rnk, srhines, void, george.burgess.iv
      
      Reviewed By: efriedma, george.burgess.iv
      
      Subscribers: eraman, haicheng, george.burgess.iv, drinkcat, theraven, reames, sanjoy, xbolva00, llvm-commits
      
      Differential Revision: https://reviews.llvm.org/D47895
      
      llvm-svn: 336613
      77eeac3d
    • Rui Ueyama's avatar
      Use StringRef instead of `const char *`. · 0230f7c7
      Rui Ueyama authored
      I don't think there's a need to use `const char *`. In most (probably all?)
      cases, we need a length of a name later, so discarding a length will
      lead to a wasted effort.
      
      Differential Revision: https://reviews.llvm.org/D49046
      
      llvm-svn: 336612
      0230f7c7
    • George Burgess IV's avatar
      Make llvm.objectsize more conservative with null · 3fbfa9c4
      George Burgess IV authored
      In non-zero address spaces, we were reporting that an object at `null`
      always occupies zero bytes. This is incorrect in many cases, so just
      return `unknown` in those cases for now.
      
      Differential Revision: https://reviews.llvm.org/D48860
      
      llvm-svn: 336611
      3fbfa9c4
  2. Jul 09, 2018
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