Commits · 31adc28d24b1a95bb47df23068b6f61dfb5cd012 · Roger Ferrer / llvm-epi · GitLab

Aug 20, 2020
- GlobalISel: Implement fewerElementsVector for G_CONCAT_VECTORS sources · 31adc28d
  Matt Arsenault authored Aug 03, 2020
  31adc28d
Aug 19, 2020
- AMDGPU/GlobalISel: Add some bitcast tests · ff5758fe
  Matt Arsenault authored Aug 19, 2020
  
  ff5758fe
- AMDGPU/GlobalISel: Add selection tests for pointer constants · 386a5ea2
  Matt Arsenault authored Aug 18, 2020
  
  386a5ea2
- Revert "[AMDGPU] Support disassembly for AMDGPU kernel descriptors" · fdf71d48
  Ronak Chauhan authored Aug 19, 2020
  fdf71d48
- [AMDGPU] Support disassembly for AMDGPU kernel descriptors · cacfb02d
  Ronak Chauhan authored Jun 19, 2020
  cacfb02d
- AMDGPU: Implement waterfall loop for MIMG instructions with 256-bit SRsrc · e7081d11
  Changpeng Fang authored Aug 18, 2020
  e7081d11
Aug 18, 2020
- GlobalISel: Implement fewerElementsVector for G_INSERT_VECTOR_ELT · 5a15f662
  Matt Arsenault authored Jul 27, 2020
  5a15f662
- [GlobalISel] Add a combine for ashr(shl x, c), c --> sext_inreg x, c' · 40e269ea
  Amara Emerson authored Aug 14, 2020
  40e269ea
- [GlobalISel][CallLowering] Look through call parameters for flags · 224a8c63
  Jessica Paquette authored Aug 17, 2020
  224a8c63
- AMDGPU/GlobalISel: Select llvm.amdgcn.groupstaticsize · 2f5f5feb
  Matt Arsenault authored Jul 26, 2020
  2f5f5feb
- AMDGPU/GlobalISel: Fix selection of s1/s16 G_[F]CONSTANT · 3ba7777b
  Matt Arsenault authored Jul 25, 2020
  3ba7777b
Aug 17, 2020
- AMDGPU/GlobalISel: Match global saddr addressing mode · a9ee0589
  Matt Arsenault authored Aug 16, 2020
  
  a9ee0589
- AMDGPU: Match global saddr addressing mode · e1a2f471
  Matt Arsenault authored Aug 13, 2020
  e1a2f471
- AMDGPU: Add baseline tests for global saddr matching · 087dcbe9
  Matt Arsenault authored Aug 15, 2020
  
  087dcbe9
- [AMDGPU] Define spill opcodes for all AGPR sizes · 24182f14
  Stanislav Mekhanoshin authored Aug 17, 2020
  24182f14
- GlobalISel: Revisit users of other merge opcodes in artifact combiner · fe171908
  Matt Arsenault authored Aug 16, 2020
  fe171908
- AMDGPU/GlobalISel: Look through copies in getPtrBaseWithConstantOffset · c8a98722
  Matt Arsenault authored Aug 15, 2020
  c8a98722
- AMDGPU/GlobalISel: Fix missing 256-bit AGPR mapping · c7b9cd31
  Matt Arsenault authored Aug 12, 2020
  
  c7b9cd31
- AMDGPU/GlobalISel: Fix using readfirstlane with ballot intrinsics · af162ac7
  Matt Arsenault authored Aug 12, 2020
  af162ac7
- AMDGPU: Fix using wrong offsets for global atomic fadd intrinsics · e0375dbc
  Matt Arsenault authored Aug 14, 2020
  e0375dbc
Aug 15, 2020
- AMDGPU: Fix global atomic saddr operand class · a7455652
  Matt Arsenault authored Aug 14, 2020
  
  a7455652
- AMDGPU: Fix matching wrong offsets for global atomic loads · e5077b5c
  Matt Arsenault authored Aug 13, 2020
  e5077b5c
- AMDGPU: Correct definitions for global saddr instructions · 47af1ac6
  Matt Arsenault authored Aug 11, 2020
  47af1ac6
- AMDGPU: Remove SIFixupVectorISel pass · 79298a50
  Matt Arsenault authored Aug 13, 2020
  79298a50
- [AMDGPU] Fix MAI ld/st hazard handling · 43a38dc2
  Stanislav Mekhanoshin authored Aug 14, 2020
  43a38dc2
Aug 14, 2020
- TableGen/GlobalISel: Partially handle immAllOnesV/immAllZerosV · 5c5e6d95
  Matt Arsenault authored Aug 01, 2020
  5c5e6d95
- AMDGPU/GlobalISel: Match andn2/orn2 for more types · 40a142fa
  Matt Arsenault authored Jul 31, 2020
  40a142fa
- [AMDGPU] Enable .rodata for amdpal os · 9aa0ff77
  Sebastian Neubauer authored Aug 13, 2020
  9aa0ff77
Aug 13, 2020
- [AMDGPU] Fix FP/BP spills when MUBUF constant offset exceeded · 7d1cb187
  Austin Kerbow authored Aug 11, 2020
  7d1cb187
- [AMDGPU] Inhibit SDWA if target instruction has FI · 0462aef5
  Stanislav Mekhanoshin authored Aug 13, 2020
  0462aef5
- DAG: Don't pass 0 alignment value to allowsMisalignedMemoryAccesses · c7191e31
  Matt Arsenault authored Aug 12, 2020
  c7191e31
- [AMDGPU] Fix missed SI_RETURN_TO_EPILOG in pre-emit peephole · d538c583
  Carl Ritson authored Aug 13, 2020
  d538c583
- [AMDGPU] Pre-commit test for D85872 · 2781f300
  Carl Ritson authored Aug 13, 2020
  
  2781f300
- [AMDGPU] Fix crash when dag-combining bitcast · 18b1e675
  Ruiling Song authored Aug 11, 2020
  18b1e675
Aug 12, 2020
- AMDGPU/GlobalISel: Select llvm.amdgcn.global.atomic.fadd · e14474a3
  Matt Arsenault authored Aug 05, 2020
  e14474a3
- AMDGPU: Handle intrinsics in performMemSDNodeCombine · 701228c4
  Matt Arsenault authored Aug 10, 2020
  701228c4
Aug 11, 2020
- Update AMDGPU testcases after bebe6a64 · cf9588a2
  Jessica Paquette authored Aug 11, 2020
  cf9588a2
- AMDGPU/GlobalISel: Manually select llvm.amdgcn.writelane · 0dc4c36d
  Matt Arsenault authored Jul 22, 2020
  0dc4c36d
- AMDGPU/GlobalISel: Fix test bugs and add a few more cases · 6cac6616
  Matt Arsenault authored Aug 08, 2020
  6cac6616
- GlobalISel: Implement bitcast action for G_INSERT_VECTOR_ELT · e2f1b48f
  Matt Arsenault authored Jun 15, 2020
  e2f1b48f