These are incomplete and were made redundant with the consolidation in:
https://reviews.llvm.org/rL324678

llvm-svn: 324754

This doesn't cover everything in InstCombiner.visitXor yet, but increases coverage for a lot of tests

llvm-svn: 324753

llvm-svn: 324751

* Use uleb128 for code offsets in the LSDA call site table.
* Omit the TTBase offset if the type table is empty.

This change can reduce the size of the DWARF/Itanium LSDA by about half.

Patch by Ryan Prichard!

llvm-svn: 324750

Rely on the assembler to finalize the layout of the DWARF/Itanium
exception-handling LSDA. Rather than calculate the exact size of each
thing in the LSDA, use assembler directives:

    To emit the offset to the TTBase label:

.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:

    To emit the size of the call site table:

.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
... call site table entries ...
.Lcst_end0:

    To align the type info table:

... action table ...
.balign 4
.long _ZTIi
.long _ZTIl
.Lttbase0:

Using assembler directives simplifies the compiler and allows switching
the encoding of offsets in the call site table from udata4 to uleb128 for
a large code size savings. (This commit does not change the encoding.)

The combination of the uleb128 followed by a balign creates an unfortunate
dependency cycle that the assembler must sometimes resolve either by
padding an LEB or by inserting zero padding before the type table. See
PR35809 or GNU as bug 4029.

Patch by Ryan Prichard!

llvm-svn: 324749

This reverts r324494 and reapplies r324487.

llvm-svn: 324747

Move utility function that depends on codegen.
Fixes build with r324487 reapplied.

llvm-svn: 324746

Make stand alone methods in AArch64InstrInfo static.

llvm-svn: 324745

llvm-svn: 324740

llvm-svn: 324738

Additionally, simplify the rest of the argument/parameter lowering code.

llvm-svn: 324737

r314974 introduced insertion of DEBUG_VALUEs after
each redefinition of debug value register in the slot index range.

In case the instruction redefining the debug value register
was a terminator, machine verifier would complain since it
enforces the rule of no non-terminator instructions
following the first terminator.

Differential Revision: https://reviews.llvm.org/D42801

llvm-svn: 324734

When adding operands to machine instructions in case of
RegisterSDNodes, generate a COPY node in case the register class
does not match the one in the instruction definition.

Differental Revision: https://reviews.llvm.org/D35561

llvm-svn: 324733

The llvm assembly parser and gas both accept "@notype" in the .type
assembly directive, but we were printing it as "@no_type", which isn't
accepted by either assembler.

Differential revision: https://reviews.llvm.org/D43116

llvm-svn: 324731

Repurpose this previously XFAIL'd test to check that jalr uses $25
as per ABI requirements for PIC code.

llvm-svn: 324729

llvm-svn: 324728

Increment was using the wrong NumUnits (the one from the ProcResGroup
and not the subunit).

llvm-svn: 324727

Summary:
The class contained arrays of two structures (DataArray and HashData).
These structures were in 1:1 correspondence, and one of them contained
pointers to the other (and *both* contained a "Name" field). By merging
these two structures into one, we can save a bit of space without
negatively impacting much of anything.

Reviewers: JDevlieghere, aprantl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43073

llvm-svn: 324724

Enable multiple COPY hints to eliminate more COPYs during register allocation.

Note that this is something all targets should do, see
https://reviews.llvm.org/D38128.

Review: Martin Storsjö
llvm-svn: 324720

Rename getLatchPredicateForGuard to more common name
getFlippedStrictnessPredicate and move it to ICmpInst class.

llvm-svn: 324717

Bugpoint will keep going even if the opt binary it's given doesn't
exist. It should at least alert the user, so it's clear why reductions
are failing.

llvm-svn: 324713

NFC.

Differential Revision: https://reviews.llvm.org/D43054

llvm-svn: 324712

As of r323633, this bit started controlling whether symbol definitions
appear in object files, and it also became sensitive to the prevailing
bit, so it needs to be included in the key.

Differential Revision: https://reviews.llvm.org/D43109

llvm-svn: 324711

Previously we extracted two subvectors and concatenate. But the concatenate will be lowered to two insert subvectors. Then DAG combine will merge once of the inserts and one of the extracts back into the original vector. We might as well just directly use one extract and one insert.

llvm-svn: 324710

This regresses a couple cases in the shuffle combining test. But those cases use intrinsics that InstCombine knows how to turn into a generic shuffle earlier. This should give opportunities to fold this earlier in InstCombine or DAG combine.

llvm-svn: 324709

[X86] Add 512-bit shuffle test cases for concatenating 128/256-bits with zeros in the upper portion.

We should recognize this and just use a mov that will zero the upper bits.

llvm-svn: 324708

Allow CLANG environment variable be copied into the testing configuration
and proper support testing with a custom path to the clang executable.

Signed-off-by: Vladimir Vereschaka <vvereschaka@accesssoftek.com>
llvm-svn: 324706

More unique_ptr-ification, ranged for loops, etc.

llvm-svn: 324705

This option isn't used anywhere, as far as I can tell.

llvm-svn: 324704

If the tests don't use the in-tree opt, we're liable to see some silly
error messages due to the version mismatch (missing flags, etc).

llvm-svn: 324703

Identified in an llvm-dev discussion around
DWARFUnit::collectAddressRanges

llvm-svn: 324702

Handles were returned by addModule and used as keys for removeModule,
findSymbolIn, and emitAndFinalize. Their job is now subsumed by VModuleKeys,
which simplify resource management by providing a consistent handle across all
layers.

llvm-svn: 324700

Make test changes added in r324584 more robust by using a regex instead of hard coded MCInst numbers.

llvm-svn: 324699

Add verification for copies involving generic registers if they are
compatible - ie if it is a generic copy, then the types are the
same, and if a COPY b/w generic and target virtual register, then
the sizes should be the same. Only checks if there are no sub registers
involved for now.

https://reviews.llvm.org/D37775

llvm-svn: 324696

Instead of:

Live Ins: %r0 %r1

print:

liveins: %r0, %r1
llvm-svn: 324694

llvm-svn: 324693

Summary:
Kernel addresses have 0xFF in the most significant byte.
A tag can not be pushed there with OR (tag << 56);
use AND ((tag << 56) | 0x00FF..FF) instead.

Reviewers: kcc, andreyknvl

Subscribers: srhines, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D42941

llvm-svn: 324691

Avoid re-computing BP only to print successor probabilities in -debug
printing.

llvm-svn: 324690

Follow-up of r324685.

llvm-svn: 324686

Instead of:

Successors according to CFG: %bb.6(0x12492492 / 0x80000000 = 14.29%)

print:

successors: %bb.6(0x12492492); %bb.6(14.29%)
llvm-svn: 324685