Commits · d5918edf0dd33060b61f28e6e3acb2573db953b1 · Roger Ferrer / llvm-epi · GitLab

Aug 27, 2019
- [mips] Fix indentation. NFC · d5918edf
  Simon Atanasyan authored Aug 26, 2019
  d5918edf
- [mips] clang-format the code. NFC · ac64924a
  Simon Atanasyan authored Aug 26, 2019
  ac64924a
- [X86] Delay combineIncDecVector until after op legalization. · 6db7f492
  Craig Topper authored Aug 26, 2019
  6db7f492
Aug 26, 2019
- [WebAssembly] Fix SSA rebuilding in SjLj transformation · 173a3a54
  Heejin Ahn authored Aug 26, 2019
  173a3a54
- Recommit [PowerPC] Update P9 vector costs for insert/extract · 18db4e9a
  Roland Froese authored Aug 26, 2019
  18db4e9a
- [Hexagon] Improve generated code for test-if-bit-clear · 9e0feaf5
  Krzysztof Parzyszek authored Aug 26, 2019
  9e0feaf5
- [X86] Add a hack to combinePMULDQ to manually turn... · 36d1588f
  Craig Topper authored Aug 26, 2019
  36d1588f
Aug 25, 2019
- [X86][DAGCombiner] Teach narrowShuffle to use concat_vectors instead of inserting into undef · b8b90ac1
  Craig Topper authored Aug 25, 2019
  b8b90ac1
- [PowerPC][AIX] Adds support for writing the .data section in assembly files · ef039a3c
  Xing Xue authored Aug 25, 2019
  ef039a3c
- [AMDGPU] Downgrade from StringLiteral to const char* in an attempt to make GCC 5 happy · 55e8c91d
  Benjamin Kramer authored Aug 25, 2019
  55e8c91d
- [X86] Teach -Os immediate sharing code to not count constant uses that will become INC/DEC. · 1abe162a
  Craig Topper authored Aug 25, 2019
  1abe162a
- [X86] Add isel patterns to match vpdpwssd avx512vnni instruction from add+pmaddwd nodes. · cc4b0596
  Craig Topper authored Aug 24, 2019
  cc4b0596
- AMDGPU: Preserve value name when inserting mul24 intrinsic · c6ab2b4f
  Matt Arsenault authored Aug 24, 2019
  c6ab2b4f
- AMDGPU: Introduce a flag to disable mul24 intrinsic formation · b3dd381a
  Matt Arsenault authored Aug 24, 2019
  b3dd381a
Aug 24, 2019
- Fix some accidental global initializers by using StringLiteral instead of StringRef · 70434770
  Benjamin Kramer authored Aug 24, 2019
  70434770
- Use a bit of relaxed constexpr to make FeatureBitset costant intializable · 16b32291
  Benjamin Kramer authored Aug 24, 2019
  16b32291
- [X86] Add an assert to mark more code that needs to be removed when the vector... · dd2cf783
  Craig Topper authored Aug 24, 2019
  dd2cf783
- [LLVM][NFC] Removing unused functions · 0b6563e8
  Guillaume Chatelet authored Aug 23, 2019
  0b6563e8
- [AMDGPU] Check for immediate SrcC in mfma in AsmParser · b37d6a75
  Stanislav Mekhanoshin authored Aug 23, 2019
  b37d6a75
- [AMDGPU] w/a for gfx908 mfma SrcC literal HW bug · e6e1c4ea
  Stanislav Mekhanoshin authored Aug 23, 2019
  e6e1c4ea
- [AMDGPU] w/a for gfx908 mfma SrcC literal HW bug · 8fe1245a
  Stanislav Mekhanoshin authored Aug 23, 2019
  8fe1245a
Aug 23, 2019
- [AArch64][GlobalISel] Import XRO load/store patterns instead of custom selection · 83fe56b3
  Jessica Paquette authored Aug 23, 2019
  83fe56b3
- Do a sweep of symbol internalization. NFC. · dc5f805d
  Benjamin Kramer authored Aug 23, 2019
  dc5f805d
- [X86] Move a transform out of combineConcatVectorOps so we don't prematurely... · bc173d4c
  Craig Topper authored Aug 23, 2019
  bc173d4c
- [PowerPC] Expand v1i128 smin · b4051e57
  Roland Froese authored Aug 23, 2019
  b4051e57
- [X86] Mark VPDPWSSD and VPDPWSSDS as commutable. Add stack folding tests. · bccd1832
  Craig Topper authored Aug 23, 2019
  bccd1832
- [SelectionDAG][X86] Enable iX SimplifyDemandedBits to vXi1... · e7211bb5
  Craig Topper authored Aug 23, 2019
  e7211bb5
- [mips] Reduce number of instructions used for loading a global symbol's value · 5f7d6ac7
  Simon Atanasyan authored Aug 23, 2019
  5f7d6ac7
- [mips] Do not include offset into `%got` expression for global symbols · 58492b18
  Simon Atanasyan authored Aug 23, 2019
  58492b18
- Use VT::getHalfNumVectorElementsVT helpers in a few places. NFCI. · c88408cf
  Simon Pilgrim authored Aug 23, 2019
  c88408cf
- [X86][BtVer2] Add a read-advance to every implicit register use of CMPXCHG8B/16B. · 8e9af64d
  Andrea Di Biagio authored Aug 23, 2019
  8e9af64d
- [X86][BtVer2] Fix latency of ALU RMW instructions. · 1630f64e
  Andrea Di Biagio authored Aug 23, 2019
  1630f64e
- [AMDGPU] gfx10 atomic optimizer changes. · eac23862
  Jay Foad authored Aug 23, 2019
  eac23862
- [X86] Make combineLoopSADPattern use CONCAT_VECTORS instead of... · 4deb388b
  Craig Topper authored Aug 23, 2019
  4deb388b
- [X86] Improve lowering of v2i32 SAD handling in combineLoopSADPattern. · bdceb9fb
  Craig Topper authored Aug 23, 2019
  bdceb9fb
- [MC] Minor cleanup to MCFixup::Kind handling. NFC. · 90b6bb75
  Sam Clegg authored Aug 23, 2019
  90b6bb75
Aug 22, 2019
- IR. Change strip* family of functions to not look through aliases. · 2452d703
  Peter Collingbourne authored Aug 22, 2019
  2452d703
- [MachO][TLOF] Use hasLocalLinkage to determine if indirect symbol is local · 5b5ee61b
  Francis Visoiu Mistrih authored Aug 22, 2019
  5b5ee61b
- [X86] Remove MCInstLower code that drops operands from some CALL and TAILJMP... · 898a0e9b
  Craig Topper authored Aug 22, 2019
  898a0e9b
- [X86][BtVer2] Fix latency/throughput of scalar integer MUL instructions. · c9649eb9
  Andrea Di Biagio authored Aug 22, 2019
  c9649eb9