Commits · ddbc0b1e516407a24d986a1998026f1ac5864270 · Roger Ferrer / llvm-epi · GitLab

Jan 14, 2020
- [TableGen] Introduce an if/then/else statement. · ddbc0b1e
  Simon Tatham authored Jan 14, 2020
  ddbc0b1e
- [TableGen] Introduce a `defvar` statement. · 3388b0f5
  Simon Tatham authored Jan 14, 2020
  3388b0f5
- [llvm-readobj][test] - Fix grammar in comments. · ec6579fc
  Georgii Rymar authored Jan 14, 2020
  ec6579fc
- [AMDGPU] Model distance to instruction in bundle · ad741853
  Stanislav Mekhanoshin authored Jan 13, 2020
  ad741853
- [AMDGPU] Fix getInstrLatency() always returning 1 · eca44745
  Stanislav Mekhanoshin authored Jan 13, 2020
  eca44745
- [AMDGPU] Remove duplicate gfx10 assembler and disassembler tests · 440ce516
  Jay Foad authored Jan 13, 2020
  440ce516
- [AMDGPU] Improve error checking in gfx10 assembler tests · 0950de26
  Jay Foad authored Jan 13, 2020
  0950de26
- [AMDGPU] Add gfx9 assembler and disassembler test cases · 63c3691f
  Jay Foad authored Jan 12, 2020
  63c3691f
- [MC] Don't resolve relocations referencing STB_LOCAL STT_GNU_IFUNC · 0136f226
  Fangrui Song authored Jan 13, 2020
  
  0136f226
- [PowerPC] [NFC] set instruction number as 1st priority of lsr cost model. · 671544c2
  Zheng Chen authored Jan 14, 2020
  
  671544c2
- [X86] Copy the nofpexcept flag when folding a load into an instruction using... · b1dcd84c
  Craig Topper authored Jan 13, 2020
  b1dcd84c
- [X86] Add test to show that nofpexcept flag is not preserved by stack reload folding. · 1768ed7f
  Craig Topper authored Jan 13, 2020
  
  1768ed7f
- [llvm-exegesis] Initialize const bitvector member · 09db6e32
  Jonas Devlieghere authored Jan 13, 2020
  09db6e32
- [GlobalISel] Change representation of shuffle masks in MachineOperand. · e68e4cbc
  Eli Friedman authored Jan 13, 2020
  e68e4cbc
- Re-enable testing of .s tests under test/CodeGen/X86. · 989bed98
  Richard Smith authored Jan 13, 2020
  989bed98
Jan 13, 2020
- [PGO][CHR] Guard against 0-to-0 branch weight and avoid division by zero crash. · 7b9f8e17
  Hiroshi Yamauchi authored Jan 13, 2020
  7b9f8e17
- Revert "[DWARF5][DebugInfo]: Added support for DebugInfo generation for auto... · 328e0f3d
  Amy Huang authored Jan 13, 2020
  328e0f3d
- [ThinLTO/WPD] Fix index-based WPD for alias vtables · 31441a3e
  Teresa Johnson authored Dec 04, 2019
  31441a3e
- [InstCombine] add FMF to tests for more coverage; NFC · 80a094e1
  Sanjay Patel authored Jan 13, 2020
  
  80a094e1
- [LegalizeIntegerTypes][X86] Add support for expanding input of... · 26c7a4ed
  Craig Topper authored Jan 13, 2020
  26c7a4ed
- [InstCombine] add tests for select --> copysign; NFC · 69f4cea4
  Sanjay Patel authored Jan 13, 2020
  69f4cea4
- [Dsymutil][Debuginfo][NFC] #3 Refactor dsymutil to separate DWARF optimizing part. · f163755e
  Alexey Lapshin authored Jan 09, 2020
  f163755e
- [LTO] Constify lto::Config reference passed to backends (NFC) · d0aad9f5
  Teresa Johnson authored Jan 13, 2020
  d0aad9f5
- Rework be15dfa8 such that it works with GlobalISel which doesn't use EVT · a0f4600f
  Daniel Sanders authored Jan 13, 2020
  a0f4600f
- [gn build] (manually) port b4a99a06 · 2b530053
  Nico Weber authored Jan 13, 2020
  
  2b530053
- Revert "[ThinLTO] Add additional ThinLTO pipeline testing with new PM" · 6288f86e
  Teresa Johnson authored Jan 13, 2020
  6288f86e
- Add a couple of missed wildcards in debug-pass-manager output checking · cb988a85
  Teresa Johnson authored Jan 13, 2020
  cb988a85
- [X86][Disassembler] Fix a bug when disassembling an empty string · 64a93afc
  Fangrui Song authored Jan 13, 2020
  64a93afc
- [llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands. · 484a7472
  Puyan Lotfi authored Jan 13, 2020
  484a7472
- Hopefully last fix for bot failures · 7aed43b6
  Teresa Johnson authored Jan 13, 2020
  7aed43b6
- Try number 2 for fixing bot failures · 292562c0
  Teresa Johnson authored Jan 13, 2020
  292562c0
- AMDGPU/GlobalISel: Select llvm.amdgcn.ds.ordered.{add|swap} · 20380142
  Matt Arsenault authored Jan 05, 2020
  
  20380142
- [SelectionDAG] ComputeNumSignBits add getValidMaximumShiftAmountConstant() for ISD::SHL support · c6fcd5d1
  Simon Pilgrim authored Jan 13, 2020
  c6fcd5d1
- AMDGPU/GlobalISel: Set insert point after waterfall loop · 3d8f1b2d
  Matt Arsenault authored Jan 04, 2020
  3d8f1b2d
- AMDGPU/GlobalISel: Add some baseline tests for vector extract · 2f090cc8
  Matt Arsenault authored Jan 03, 2020
  2f090cc8
- AMDGPU/GlobalISel: Fix branch targets when emitting SI_IF · ca19d7a3
  Matt Arsenault authored Jan 05, 2020
  ca19d7a3
- AMDGPU/GlobalISel: Simplify assert · 7d9b0a61
  Matt Arsenault authored Jan 13, 2020
  
  7d9b0a61
- [X86][SSE] Add sitofp(shl(sext(x),y)) test case with non-uniform shift value · ffc05d0d
  Simon Pilgrim authored Jan 13, 2020
  ffc05d0d
- Fix tests for builtbot failures · bb2e5f5e
  Teresa Johnson authored Jan 13, 2020
  bb2e5f5e
- [LegalizeTypes] Add SoftenFloatResult support for STRICT_SINT_TO_FP/STRICT_UINT_TO_FP · 05366870
  Andrew Wei authored Jan 14, 2020
  05366870