Commits · eb5af0acf054a73d461ac768d8cb035ee2a64383 · Roger Ferrer / llvm-epi · GitLab

Jun 27, 2022
- [Symbolize] Add log markup --filter to llvm-symbolizer. · eb5af0ac
  Daniel Thornburgh authored May 04, 2022
  eb5af0ac
- [OpenMP] Only strip runtime attributes if needed · c7243f21
  Joseph Huber authored Jun 27, 2022
  c7243f21
- [NFC][SVE] Add more tests of vector compares and selects taking an immediate operand. · 049e1071
  Paul Walker authored Jun 22, 2022
  049e1071
- Round up zero-sized symbols to 1 byte in `.debug_aranges` (without breaking other logic). · becbbb7e
  Patrick Walton authored Jun 27, 2022
  becbbb7e
- [memprof] Return an error for unsupported symbolization. · 3a1a404a
  Snehasish Kumar authored Jun 24, 2022
  3a1a404a
- [llvm-ar] Fix MRI ADDLIB command when used with thin archives · 6a1e5f5a
  gbreynoo authored Jun 27, 2022
  6a1e5f5a
- [AMDGPU] Cluster stores as well as loads for GFX11 · b5818e4e
  Jay Foad authored Jun 24, 2022
  b5818e4e
- [GlobalOpt] Fix memset handling in global ctor evaluation (PR55859) · f65c88c4
  Nikita Popov authored Jun 24, 2022
  f65c88c4
- [GlobalOpt] Add tests for memset with non-zero value (NFC) · 771c46ad
  Nikita Popov authored Jun 27, 2022
  
  771c46ad
- [SPARC] Don't do leaf optimization on procedures with inline assembly · 1466d65d
  Koakuma authored Jun 27, 2022
  1466d65d
- [ARM][Thumb] Command-line option to ensure AAPCS compliant Frame Records · 70a5c525
  Lucas Prates authored May 06, 2022
  70a5c525
- ARM: don't try to load function pointer before long call. · 69ae441e
  Tim Northover authored Jun 27, 2022
  69ae441e
- [IndVars] Add test for PR56242 (NFC) · cfb4c1a7
  Nikita Popov authored Jun 27, 2022
  
  cfb4c1a7
- MIR: Fix parse error on empty CustomRegMask · 97ed2fbc
  Matt Arsenault authored Jun 22, 2022
  
  97ed2fbc
- [AMDGPU] Regenerate MIR checks. NFC. · 8871c3c5
  Jay Foad authored Jun 27, 2022
  
  8871c3c5
- [STACKMAPS] Document+test UINT64_MAX stack size. · 94fbb147
  Edd Barrett authored Jun 27, 2022
  94fbb147
- [IR] Move vector.insert/vector.extract out of experimental namespace · a83aa33d
  Bradley Smith authored Jun 16, 2022
  a83aa33d
- [X86] combineConcatVectorOps - IsConcatFree must check extraction index · 0b998053
  Simon Pilgrim authored Jun 27, 2022
  0b998053
- [llvm-ar] Improve MRI script CREATE command handling · 7de277d6
  gbreynoo authored Jun 27, 2022
  7de277d6
- [AMDGPU] Fix assertion failure on mad with negative immediate addend · 77e63b25
  Jay Foad authored Jun 23, 2022
  77e63b25
- [SCEV] Use SCEVUnknown(poison) instead of SCEVUnknown(undef). · e4e22b6d
  Florian Hahn authored Jun 27, 2022
  e4e22b6d
- [ArgPromotion] Remove legacy PM support · 217e8576
  Nikita Popov authored Jun 24, 2022
  217e8576
- Revert "[Coroutines] Only do symmetric transfer if optimization is on" · 24e53b01
  Chuanqi Xu authored Jun 27, 2022
  24e53b01
- [NFC][SVE] Auto-generate CHECK lines for intrinsic codegen tests. · fadea441
  Paul Walker authored Jun 25, 2022
  
  fadea441
Jun 26, 2022
- [LICM] Use poison to replace unreachable values instead of undef [NFC] · 6ef9a2ad
  Nuno Lopes authored Jun 26, 2022
  
  6ef9a2ad
- [LoopSimplifyCFG] use poison when replacing dead instructions instead of undef [NFC] · 3fa2411d
  Nuno Lopes authored Jun 26, 2022
  
  3fa2411d
- [AVR] Fix expanding MOVW for overlapping registers · 5650688e
  Patryk Wychowaniec authored Jun 26, 2022
  5650688e
Jun 25, 2022
- [RISCV] Merge more rv32/rv64 vector intrinsic tests that contain the same content. · 3d37e785
  Craig Topper authored Jun 25, 2022
  
  3d37e785
- [ORC][LLJIT] Define atexit symbol in GenericLLVMIRPlatformSupport. · 7d101e43
  Sunho Kim authored Jun 26, 2022
  7d101e43
- [RISCV] Implement getVScaleForTuning and thus prefer scalable vectorization when enabled · 9803b0d1
  Philip Reames authored Jun 25, 2022
  9803b0d1
- [BasicTTI] Account for vector of pointers in getMemoryOpCost · ab736a27
  Philip Reames authored Jun 25, 2022
  ab736a27
- GlobalISel: Make LoadStoreOpt preserve all · e7bc7373
  Matt Arsenault authored Jun 24, 2022
  e7bc7373
- X86: Regenerate test checks · 341e03f9
  Matt Arsenault authored Jun 24, 2022
  
  341e03f9
Jun 24, 2022
- [HWASan] Use new IR attribute for communicating unsanitized globals. · f5706640
  Mitch Phillips authored Jun 24, 2022
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- [LV][RISCV] Add coverage showing scalable codegen when etype != ELEN · ae8fac6f
  Philip Reames authored Jun 24, 2022
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- [Inline] Annotate inline pass name with link phase information for analysis. · e0d06959
  Mingming Liu authored May 12, 2022
  e0d06959
- [SLP]Improve shuffles cost estimation where possible. · 2faacf61
  Alexey Bataev authored Dec 09, 2021
  2faacf61
- [GlobalOpt] Perform store->dominated load forwarding for stored once globals · e422c0d3
  Arthur Eubanks authored Jun 18, 2022
  e422c0d3
- [RISCV] Split a vectorizer test runline so that upcoming changes in defaults are visible · 056d6393
  Philip Reames authored Jun 24, 2022
  
  056d6393
- [RISCV] Modify a test line so it exercises the intended configuration once we... · adbe7186
  Philip Reames authored Jun 24, 2022
  adbe7186