Commits · ed8409dfa0a92d80c021f13ca271737492522cc7 · Roger Ferrer / llvm-epi · GitLab

Sep 27, 2022
- [ObjC][ARC] Fix target register for call expanded from CALL_RVMARKER on Windows · ed8409df
  Stefan Gränitz authored Sep 27, 2022
  ed8409df
- [AArch64] Remove incorrect zero element insert-bitcast patterns · 401481da
  David Green authored Sep 27, 2022
  401481da
- [DAG] select Cond, -1, C --> or (sext Cond), C if Cond is MVT::i1 · d1baed7c
  Amaury Séchet authored Aug 05, 2022
  d1baed7c
- [VE] Change to expand FPOW · de801320
  Kazushi (Jam) Marukawa authored Sep 27, 2022
  de801320
- [LoongArch] Support lowering frames larger than 2048 bytes · c2a44b59
  WANG Xuerui authored Sep 27, 2022
  c2a44b59
- [X86] Clean up prefixes for avoid-sfb.ll · 8427c836
  Simon Pilgrim authored Sep 27, 2022
  8427c836
- [AArch64] Add Neoverse V2 CPU support · fbb11941
  David Sherwood authored Sep 15, 2022
  fbb11941
- [WebAssembly] Use intrinsics for table.get/set instructions · 1bd1a440
  Paulo Matos authored Sep 27, 2022
  1bd1a440
- [VP][RISCV] Add vp.maxnum and vp.minnum intrinsics and RISC-V support. · 04e1301f
  Yeting Kuo authored Sep 26, 2022
  04e1301f
- [RISCV][NFC] Merge rv32 and rv64 insertelt/extract fp tests. · ae425635
  Jianjian GUAN authored Sep 26, 2022
  ae425635
- [PowerPC] XCOFF exception section support on the direct assembler path · ce004fb4
  Paul Scoropan authored Sep 26, 2022
  ce004fb4
- [NFC] legalize triple for dxil tests. · 208d0f04
  Xiang Li authored Sep 26, 2022
  
  208d0f04
Sep 26, 2022
- [Hexagon] Avoid some unnecessary sign-extend instructions · dfaf7a28
  Krzysztof Parzyszek authored Sep 26, 2022
  dfaf7a28
- [Hexagon] Make sure we can still shift scalar vectors by non-splats · d6c0a5be
  Krzysztof Parzyszek authored Sep 26, 2022
  
  d6c0a5be
- [LegalizeTypes][RISCV] Support f16 in ExpandIntRes_LLROUND_LLRINT. · afdd600a
  Craig Topper authored Sep 26, 2022
  afdd600a
- AMDGPU: Handle new address pattern in LowerKernelAttributes introduced by opaque pointers · dee4bc4a
  Changpeng Fang authored Sep 26, 2022
  dee4bc4a
- [AMDGPU] Precommit switching test to generated checks for D134463 · e6c29c03
  jeff authored Sep 26, 2022
  e6c29c03
- Autogenerate stack-folding-fp X86 tests. NFC · 79b69bf8
  Amaury Séchet authored Sep 26, 2022
  
  79b69bf8
- [VE] Disable automatic maxnum/minnum selection · 1cef30b9
  Kazushi (Jam) Marukawa authored Sep 25, 2022
  1cef30b9
- [VE] Support smax/smin · 76c76e9a
  Kazushi (Jam) Marukawa authored Sep 24, 2022
  76c76e9a
- [ARM] Enable and/cmp0 folding · 66021101
  Momchil Velikov authored Sep 26, 2022
  66021101
- [ARM] Enable and/cmp0 folding - precommit test · a412e9cd
  Momchil Velikov authored Sep 26, 2022
  a412e9cd
- [AArch64] Enable FeatureFuseAdrpAdd for all Arm cpus · bebc9695
  David Green authored Sep 26, 2022
  bebc9695
- [LoongArch] Add codegen support for strict_fsetccs and any_fsetcc · a6d699b5
  gonglingqin authored Sep 26, 2022
  a6d699b5
- [LoongArch] Lower BlockAddress/JumpTable · 75265c7f
  wanglei authored Sep 26, 2022
  75265c7f
- [VP][RISCV] Add vp.sqrt intrinsic and RISC-V support. · 43c5fbdd
  Yeting Kuo authored Sep 12, 2022
  43c5fbdd
- [LoongArch] Support 'generic' as a valid CPU name · ad6fe320
  WANG Xuerui authored Sep 26, 2022
  ad6fe320
- [LoongArch] Support llvm.thread.pointer · f89f0990
  WANG Xuerui authored Sep 26, 2022
  f89f0990
- StructurizeCFG: Set Undef for non-predecessors in setPhiValues() · a5676a3a
  Ruiling Song authored Aug 23, 2022
  a5676a3a
- StructurizeCFG: prefer reduced number of live values · 40e9284f
  Ruiling Song authored Aug 22, 2022
  40e9284f
- AMDGPU: Add a test to show how later optimization works · 66325d9b
  Ruiling Song authored Aug 23, 2022
  66325d9b
- AMDGPU: Add a pass to rewrite certain undef in PHI · cf14c7ca
  Ruiling Song authored Sep 13, 2022
  cf14c7ca
- [Clang][LoongArch] Add inline asm support for constraints f/l/I/K · 394f3091
  Weining Lu authored Sep 22, 2022
  394f3091
Sep 25, 2022
- Autogenerate a couple of test in the AMDGPU backend. NFC · dc947ba3
  Amaury Séchet authored Sep 25, 2022
  
  dc947ba3
- [AMDGPU] Pattern for flat atomic fadd f64 intrinsic with local addr · dcc756d0
  Petar Avramovic authored Sep 25, 2022
  dcc756d0
- [X86] Pre-commit unit test for D134477 · 67a04edd
  Han Zhu authored Sep 24, 2022
  
  67a04edd
- [RISCV] Pattern match scalable strided load/store · 5358968e
  Philip Reames authored Sep 24, 2022
  5358968e
- [RISCV] Add lowering for scalable @llvm.riscv.masked.strided.load/store · 6e7c54ec
  Philip Reames authored Sep 24, 2022
  6e7c54ec
Sep 24, 2022
- [ARM] Fix check lines in memcpy-inline.ll test. NFC · 2b187eff
  David Green authored Sep 24, 2022
  2b187eff
- [BPF] memcmp.ll - add checks for all loads · 01631a83
  Simon Pilgrim authored Sep 24, 2022
  01631a83