Commits · f8825577be389f1ffb4720cf2ece82784b600e95 · Roger Ferrer / llvm-epi · GitLab

Nov 08, 2018
- [ARM] Enable spilling of the hGPR register class in Thumb2 · 7c84b2e3
  Petr Pavlu authored Nov 08, 2018
  7c84b2e3
Oct 30, 2018
- [SchedModel] Fix for read advance cycles with implicit pseudo operands. · 611b533f
  Jonas Paulsson authored Oct 30, 2018
  611b533f
Oct 26, 2018
- [ARM] Make InstrEmitter mark CPSR defs dead for Thumb1. · 2ac11629
  Eli Friedman authored Oct 26, 2018
  2ac11629
Oct 23, 2018
- CGP: Clear data structures at the end of a loop iteration instead of the beginning. · abd820a9
  Peter Collingbourne authored Oct 23, 2018
  abd820a9
Sep 24, 2018
- [ARM] Do not fuse VADD and VMUL on the Cortex-M4 and Cortex-M33 · d986ede3
  Sjoerd Meijer authored Sep 24, 2018
  d986ede3
Sep 18, 2018
- Work around grep vs. CRLF issue in Thumb2 test by matching excess whitespace · d38f9a6c
  Reid Kleckner authored Sep 18, 2018
  d38f9a6c
Aug 16, 2018
- [SelectionDAG] Improve the legalisation lowering of UMULO. · 73e8a784
  Eli Friedman authored Aug 16, 2018
  73e8a784
Jul 11, 2018
- [ARM] Treat cmn immediates as legal in isLegalICmpImmediate. · d2c73923
  Eli Friedman authored Jul 10, 2018
  d2c73923
Jun 21, 2018
- Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred. · dfd14ade
  Alina Sbirlea authored Jun 20, 2018
  dfd14ade
Jun 20, 2018
- ARM: convert ORR instructions to ADD where possible on Thumb. · 644a8195
  Tim Northover authored Jun 20, 2018
  644a8195
Jun 19, 2018
- [ARM] Thumb2 constant cmp testcases. · de735c97
  Eli Friedman authored Jun 19, 2018
  de735c97
May 17, 2018
- [Thumb2] fix typo in test from r332548 · 2e50cec5
  Sanjay Patel authored May 17, 2018
  2e50cec5
- [Thumb] preserve test intent by removing undef · 68c83a24
  Sanjay Patel authored May 16, 2018
  68c83a24
- [Thumb] preserve test intent by removing undef · eedf265a
  Sanjay Patel authored May 16, 2018
  eedf265a
Apr 14, 2018
- MachO: trap unreachable instructions · 271d3d27
  Tim Northover authored Apr 13, 2018
  271d3d27
Mar 22, 2018
- [CodeGen] Add a new pass for PostRA sink · 2ecb7ba4
  Jun Bum Lim authored Mar 22, 2018
  2ecb7ba4
Feb 27, 2018
- ARM: Don't rewrite add reg, $sp, 0 -> mov reg, $sp if the add defines CPSR. · e8436e86
  Peter Collingbourne authored Feb 27, 2018
  e8436e86
Feb 16, 2018
- [ARM] Return true in enableMultipleCopyHints(). · 995ba6e4
  Jonas Paulsson authored Feb 16, 2018
  995ba6e4
- [ARM] Materialise some boolean values to avoid a branch · d41059a9
  Roger Ferrer Ibanez authored Feb 16, 2018
  d41059a9
Jan 31, 2018
- Followup on Proposal to move MIR physical register namespace to '$' sigil. · 43e94b15
  Puyan Lotfi authored Jan 31, 2018
  43e94b15
Jan 19, 2018
- Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) · 1e68724d
  Daniel Neilson authored Jan 19, 2018
  1e68724d
Jan 09, 2018
- [CodeGen] Don't print "pred:" and "opt:" in -debug output · 7d9bef8f
  Francis Visoiu Mistrih authored Jan 09, 2018
  7d9bef8f
Dec 19, 2017
- [ARM] Register the Thumb2SizeReducePass. NFC · 110844d2
  David Green authored Dec 19, 2017
  110844d2
Dec 07, 2017
- [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. · a8a83d15
  Francis Visoiu Mistrih authored Dec 07, 2017
  a8a83d15
Dec 04, 2017
- [CodeGen] Unify MBB reference format in both MIR and debug output · 25528d6d
  Francis Visoiu Mistrih authored Dec 04, 2017
  25528d6d
Nov 30, 2017
- [CodeGen] Always use `printReg` to print registers in both MIR and debug · c71cced0
  Francis Visoiu Mistrih authored Nov 30, 2017
  c71cced0
Nov 13, 2017
- [arm] Fix Unnecessary reloads from GOT. · 76d5ac49
  Evgeniy Stepanov authored Nov 13, 2017
  76d5ac49
Oct 26, 2017
- [ARM] Honor -mfloat-abi for libcall calling convention · d5dfb62d
  Eli Friedman authored Oct 26, 2017
  d5dfb62d
Oct 25, 2017
- [ARM] Swap cmp operands for automatic shifts · ccb209bb
  Sam Parker authored Oct 25, 2017
  ccb209bb
Aug 22, 2017
- [ARM] Call setBooleanContents(ZeroOrOneBooleanContent) · f63d7016
  Renato Golin authored Aug 22, 2017
  f63d7016
Aug 15, 2017
- [Dominators] Include infinite loops in PostDominatorTree · 638c085d
  Jakub Kuderski authored Aug 15, 2017
  638c085d
Aug 02, 2017
- ARM: Do not use llc -march in tests. · 7c91336e
  Matthias Braun authored Aug 01, 2017
  7c91336e
Jul 12, 2017
- [ARM] Adjust ifcvt heuristic for the diamond ifcvt case · 97cc2831
  John Brawn authored Jul 12, 2017
  97cc2831
Jun 28, 2017
- [ARM] Improve if-conversion for M-class CPUs without branch predictors · 75d76e5e
  John Brawn authored Jun 28, 2017
  75d76e5e
- [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). · eecb353d
  Kristof Beyls authored Jun 28, 2017
  eecb353d
Jun 22, 2017
- Don't conditionalize Neon instructions, even in IT blocks. · 9665249f
  Kristof Beyls authored Jun 22, 2017
  9665249f
May 30, 2017
- MIR: remove explicit "noVRegs" property. · fb26d9a2
  Tim Northover authored May 30, 2017
  fb26d9a2
May 16, 2017
- Elide stores which are overwritten without being observed. · da8f2212
  Nirav Dave authored May 16, 2017
  da8f2212
- [ShrinkWrapping] Handle restores on no-return paths · ebbc7159
  Francis Visoiu Mistrih authored May 15, 2017
  ebbc7159
Apr 10, 2017
- Add address space mangling to lifetime intrinsics · f10061ec
  Matt Arsenault authored Apr 10, 2017
  f10061ec