Commits · fc18a88231ccca7c5e93f7563e44fd636833ed2c · Roger Ferrer / llvm-epi · GitLab

Jul 08, 2022
- [LiveIntervals] Fix incorrect range (re)construction from subranges. · 6858a17f
  Daniil Fukalov authored Jul 08, 2022
  6858a17f
- [SDAG] try to replace subtract-from-constant with xor · 8b756713
  Sanjay Patel authored Jul 08, 2022
  8b756713
- [NFC][SelectionDAG] Fix debug prints in salvageUnresolvedDbgValue · 6b62ca90
  OCHyams authored Jul 08, 2022
  6b62ca90
- [AArch64][GlobalISel] Fix call lowering for <3 x i32> vector arguments · 2483f43d
  Petar Avramovic authored Jul 06, 2022
  2483f43d
- [SelectionDAG] computeKnownBits / ComputeNumSignBits for the remaining overflow-aware nodes · 2247fdc8
  Sergei Barannikov authored Jul 08, 2022
  2247fdc8
Jul 07, 2022
- [Metadata] Add 'exclude' metadata to add the exclude flags on globals · 41fba3c1
  Joseph Huber authored Jul 05, 2022
  41fba3c1
- [Object] Add ELF section type for offloading objects · 1d2ce4da
  Joseph Huber authored Jul 03, 2022
  1d2ce4da
- [LegalizeTypes] Replace vecreduce_xor/or/and with vecreduce_add/umax/umin if not legal · 60d6be5d
  Bradley Smith authored Jun 29, 2022
  60d6be5d
- [AArc64] Legalisation of compares and truncates of nxv1i1 types. · 15c3ba8a
  Sander de Smalen authored Jul 06, 2022
  15c3ba8a
Jul 06, 2022
- [AsmPrinter] Fix bit pattern for i1 vectors. · 696f5366
  Eli Friedman authored Jul 06, 2022
  696f5366
- [stackmaps] Start legalizing live variable operands · ed8ef65f
  Edd Barrett authored Jun 17, 2022
  ed8ef65f
- [LLVM] Add the support for fmax and fmin in atomicrmw instruction · 1023ddaf
  Shilei Tian authored Jul 06, 2022
  1023ddaf
- [ValueTracking] Accept Instruction in isSafeToSpeculativelyExecute() (NFC) · f96cb66d
  Nikita Popov authored Jul 06, 2022
  f96cb66d
- [SelectionDAGISel] Drop unused variable (NFC) · bb84e5ee
  Nikita Popov authored Jul 06, 2022
  
  bb84e5ee
- [IR] Remove Constant::canTrap() (NFC) · 8ee913d8
  Nikita Popov authored Jul 06, 2022
  8ee913d8
Jul 05, 2022
- [DAG] visitREM - use isAllOnesOrAllOnesSplat instead of isConstOrConstSplat · 7068c843
  Simon Pilgrim authored Jul 05, 2022
  7068c843
- [DAG] foldAddSubOfSignBit - don't bother creating the new shift node unless... · e7a0fa4d
  Simon Pilgrim authored Jul 05, 2022
  e7a0fa4d
- [NFC] Fix wrong comment. · 04c5fed5
  Thomas Symalla authored Jul 05, 2022
  
  04c5fed5
Jul 04, 2022
- [DAG] visitTRUNCATE - move GetDemandedBits AFTER SimplifyDemandedBits. · cce64e7a
  Simon Pilgrim authored Jul 04, 2022
  cce64e7a
- [IR] Remove support for insertvalue constant expression · 7283f48a
  Nikita Popov authored Jun 28, 2022
  7283f48a
- [AIX] Handling the label alignment of a global · d2a35e4d
  esmeyi authored Jul 03, 2022
  d2a35e4d
Jul 01, 2022
- [GISel] Don't fold convergent instruction across CFG · f4145ddf
  Quentin Colombet authored Jul 01, 2022
  f4145ddf
- [AArch64] Make nxv1i1 types a legal type for SVE. · 690db164
  Sander de Smalen authored Jul 01, 2022
  690db164
- [ISel] Match all bits when merge undefs for DAG combine · 72a23cef
  Xiang1 Zhang authored Jul 01, 2022
  72a23cef
- Revert "[ISel] Match all bits when merge undef(s) for DAG combine" · 64f44a90
  Xiang1 Zhang authored Jul 01, 2022
  64f44a90
- [ISel] Match all bits when merge undef(s) for DAG combine · 5fe5aa28
  Xiang1 Zhang authored Jun 30, 2022
  
  5fe5aa28
- [NFC] Switch a few uses of undef to poison as placeholders for unreachble code · 373571db
  Nuno Lopes authored Jun 30, 2022
  
  373571db
Jun 30, 2022
- [AMDGPU] Check for CopyToReg PhysReg clobbers in pre-RA-sched · 09424f80
  jeff authored Jun 27, 2022
  09424f80
- [greedyalloc] Return early when there is no register to allocate. · fa8656d2
  Luo, Yuanke authored Jun 29, 2022
  fa8656d2
Jun 29, 2022
- [GlobalMerge] Ensure that the MustKeepGlobalVariables has all globals from each landingpad clause. · e50a8c84
  Stefan Pintilie authored Jun 29, 2022
  e50a8c84
- [ConstExpr] Remove more leftovers of extractvalue expression (NFC) · 16033ffd
  Nikita Popov authored Jun 29, 2022
  16033ffd
- [AsmPrinter] Further restrict expressions supported in global initializers · 348ea34b
  Nikita Popov authored Jun 16, 2022
  348ea34b
- [X86][AMX] Split greedy RA for tile register · 5cb09798
  Luo, Yuanke authored Jun 25, 2022
  5cb09798
Jun 28, 2022
- [MachineCombiner, AArch64] Add a new pattern A-(B+C) => (A-B)-C to reduce latency · ddc9e886
  Guozhi Wei authored Jun 28, 2022
  ddc9e886
- [Propeller] Encode address offsets of basic blocks relative to the end of the... · 0aa6df65
  Rahman Lavaee authored Jun 28, 2022
  0aa6df65
- SelectionDAG: allow FP extensions when folding extract/insert. · 4aafebce
  Tim Northover authored Jun 28, 2022
  4aafebce
- [Alignment] Replace commonAlignment with std::min · 3c126d5f
  Guillaume Chatelet authored Jun 22, 2022
  3c126d5f
- [LiveInterval] Simplify with partition_point. NFC · f1e27716
  Fangrui Song authored Jun 27, 2022
  
  f1e27716
Jun 27, 2022
- [ubsan] Using metadata instead of prologue data for function sanitizer · 6678f8e5
  Yuanfang Chen authored Jun 27, 2022
  6678f8e5
- Round up zero-sized symbols to 1 byte in `.debug_aranges` (without breaking other logic). · becbbb7e
  Patrick Walton authored Jun 27, 2022
  becbbb7e