Commits · fc82409b5ce5ddcd038ff0bf192a9a2a03b23020 · Roger Ferrer / llvm-epi · GitLab

Jul 07, 2021
- [Attributor] Simplify operands inside of simplification AAs first · fc82409b
  Johannes Doerfert authored Jun 22, 2021
  fc82409b
- tests/CodeGen: Use %python lit substitution when invoking python · 7f1c077c
  Tom Stellard authored Jul 06, 2021
  7f1c077c
- [PowerPC] Re-enable combine for i64 BSWAP on targets without LDBRX · 3553698d
  Nemanja Ivanovic authored Jul 06, 2021
  3553698d
- [AArch64] Add more tests related to vselect with constant condition. · 75eb43ab
  Eli Friedman authored Jul 06, 2021
  75eb43ab
- [AArch64] Sync isDef32 to the current x86 version. · 56b3e9ed
  Eli Friedman authored Jul 06, 2021
  56b3e9ed
- [AMDGPU] Move atomic expand past infer address spaces · a0ab4579
  Stanislav Mekhanoshin authored Jul 06, 2021
  a0ab4579
- [AMDGPU] Do not run IR optimizations at -O0 · 5915d338
  Stanislav Mekhanoshin authored Jul 06, 2021
  5915d338
- [AMDGPU] Fix pass name of AMDGPULowerKernelAttributes. NFC. · aff66b7e
  Stanislav Mekhanoshin authored Jul 06, 2021
  aff66b7e
Jul 06, 2021
- [NFC][AMDGPU] Add link to AMD GPU gfx906 instruction set architecture · 8d69635e
  Tony Tye authored Jul 02, 2021
  8d69635e
- [Hexagon] Generate trap/undef if misaligned access is detected · 94e01d57
  Krzysztof Parzyszek authored Jun 25, 2021
  94e01d57
- Recommit [ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers. · 7ac1c7be
  Eli Friedman authored Jul 06, 2021
  7ac1c7be
- [RISCV] Implement lround*/llround*/lrint*/llrint* with fcvt instruction with -fno-math-errno · 12d51f95
  Craig Topper authored Jul 06, 2021
  12d51f95
- [Tests] Update some tests for D104765. NFC · be0924ad
  David Green authored Jul 06, 2021
  
  be0924ad
- [gn build] Port 8517a26d · 7a46d8f5
  LLVM GN Syncbot authored Jul 06, 2021
  
  7a46d8f5
- Revert "[ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers." · a6d081b2
  Eli Friedman authored Jul 06, 2021
  a6d081b2
- [InstSimplify] fix bug in poison propagation for FP ops · 4ec7c021
  Sanjay Patel authored Jul 06, 2021
  4ec7c021
- [InstSimplify][test] add tests for poison propagation through FP calls; NFC · 35e8cc49
  Sanjay Patel authored Jul 06, 2021
  
  35e8cc49
- [LV] Disable epilogue vectorization for non-latch exits · 9ffa90d6
  Philip Reames authored Jul 06, 2021
  9ffa90d6
- [LoopVersion] Move an assert [nfc-ish] · 600624a1
  Philip Reames authored Jul 06, 2021
  
  600624a1
- [ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers. · 74d6ce5d
  Eli Friedman authored Jul 06, 2021
  74d6ce5d
- [SystemZ] Support the 'N' code for the odd register in inline-asm. · 458eac25
  Jonas Paulsson authored Jul 06, 2021
  458eac25
- [DebugInfo][InstrRef][3/4] Produce DBG_INSTR_REFs for all variable locations · 2b2ffb7b
  Jeremy Morse authored Jun 02, 2021
  2b2ffb7b
- [RISCV] Add support for matching vwmul(u) and vwmacc(u) from fixed vectors. · 2b5e5311
  Craig Topper authored Jul 06, 2021
  2b5e5311
- Fix coro lowering of single predecessor phis · 846a530e
  Arnold Schwaighofer authored Apr 01, 2021
  846a530e
- [CostModel][X86] fptosi/fptoui to i8/i16 are truncated from fptosi to i32 · b298308b
  Simon Pilgrim authored Jul 06, 2021
  b298308b
- [SystemZ] Generate XC loop for memset 0 of variable length. · 37a92f3b
  Jonas Paulsson authored Jun 04, 2021
  37a92f3b
- [SLP]Fix non-determinism in PHI sorting. · 4e1a0684
  Alexey Bataev authored Jun 28, 2021
  4e1a0684
- Use swift mangling for resume functions · 130ea3ce
  Arnold Schwaighofer authored Jul 06, 2021
  130ea3ce
- [AArch64][SVE] Fix selection failures for scalable MLOAD nodes with passthru · 5ab9000f
  Bradley Smith authored Jul 01, 2021
  5ab9000f
- Recommit "[VPlan] Add VPReductionPHIRecipe (NFC)." and follow-ups. · ef0d147c
  Florian Hahn authored Jul 06, 2021
  ef0d147c
- [CostModel][X86] i8/i16 sitofp/uitofp are sext/zext to i32 for sitofp · 6f3f9535
  Simon Pilgrim authored Jul 06, 2021
  6f3f9535
- [LV] Prevent vectorization with unsupported element types. · a7512401
  Kerry McLaughlin authored Jul 06, 2021
  a7512401
- [CodeGen][AArch64][SVE] Use ld1r[bhsd] for vector splat from memory · c5dfee44
  Peter Waller authored May 26, 2021
  c5dfee44
- Revert "[VPlan] Add VPReductionPHIRecipe (NFC)." and follow-ups · 706bbfb3
  Florian Hahn authored Jul 06, 2021
  706bbfb3
- [VPlan] Mark overriden function in VPWidenPHIRecipe as virtual. · 3fed6d44
  Florian Hahn authored Jul 06, 2021
  3fed6d44
- [VPlan] Add destructor to VPReductionRecipe to unbreak build. · bbcbf21a
  Florian Hahn authored Jul 06, 2021
  bbcbf21a
- [AMDGPU] Remove outdated comment and tidy up. NFC. · c9d747e9
  Jay Foad authored Jul 06, 2021
  c9d747e9
- [VPlan] Add VPReductionPHIRecipe (NFC). · 6c3451cd
  Florian Hahn authored Jul 06, 2021
  6c3451cd
- [AMDGPU] Set optional PAL metadata · db646de3
  Sebastian Neubauer authored Jun 29, 2021
  db646de3
- [LV] Collect a list of all element types found in the loop (NFC) · 17b701c4
  Kerry McLaughlin authored Jul 06, 2021
  17b701c4