llvm-svn: 228166

Patch by İsmail Dönmez

llvm-svn: 228164

Thanks Dmitri!

llvm-svn: 228163

llvm-svn: 228161

llvm-svn: 228160

Summary:
Now that the darwin-version tests in Driver and Frontend are
testing different parts of the version encoding instead of doing
duplicated work

Reviewers: rnk

Reviewed By: rnk

Subscribers: rnk, cfe-commits

Differential Revision: http://reviews.llvm.org/D7134

llvm-svn: 228159

[Hexagon] Adding encoding information for absolute-reg mode stores.  Xfailing a test until constant extenders are correctly put in the same packet.

llvm-svn: 228158

Summary:
Allow user to provide multiple blacklists by passing several
-fsanitize-blacklist= options. These options now don't override
default blacklist from Clang resource directory, which is always
applied (which fixes PR22431).

-fno-sanitize-blacklist option now disables all blacklists that
were specified earlier in the command line (including the default
one).

This change depends on http://reviews.llvm.org/D7367.

Test Plan: regression test suite

Reviewers: timurrrr

Subscribers: cfe-commits, kcc, pcc

Differential Revision: http://reviews.llvm.org/D7368

llvm-svn: 228156

Summary:
This change allows users to create SpecialCaseList objects from
multiple local files. This is needed to implement a proper support
for -fsanitize-blacklist flag (allow users to specify multiple blacklists,
in addition to default blacklist, see PR22431).

DFSan can also benefit from this change, as DFSan instrumentation pass now
accepts ABI-lists both from -fsanitize-blacklist= and -mllvm -dfsan-abilist flags.

Go bindings are fixed accordingly.

Test Plan: regression test suite

Reviewers: pcc

Subscribers: llvm-commits, axw, kcc

Differential Revision: http://reviews.llvm.org/D7367

llvm-svn: 228155

llvm-svn: 228154

llvm-svn: 228152

This is a bug that was caused due to storing the feature bitset in a 32-bit
variable when it is a 64-bit mask, discarding the top half of the feature set.

llvm-svn: 228151

The member m_nTimes is used in rest of lldb-mi to represent hit count.
In one place, it was assigned a wrong value (number of locations). This
resulted in lldb-mi showing a hit count of variable 1 when it was created.

Committed as obvious.

llvm-svn: 228150

Differential Revision: http://reviews.llvm.org/D6581

llvm-svn: 228149

This lets clang-format format

    __try {
    } __except(0) {
    }

and

    __try {
    } __finally {
    }

correctly. __try and __finally are keywords if `LangOpts.MicrosoftExt` is set,
so this turns this on.  This also enables a few other keywords, but it
shouldn't overly perturb regular clang-format operation.  __except is a
context-sensitive keyword, so `AdditionalKeywords` needs to be passed around to
a few more places.

Fixes PR22321.

llvm-svn: 228148

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7377

llvm-svn: 228147

llvm-svn: 228146

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7376

llvm-svn: 228145

While probably technically correct, the solution r228138 was quite hard
to read/understand. This should be simpler.

Also added a test to ensure that we are still visiting the syntactic form
as well.

llvm-svn: 228144

Summary:
Named registers with the constraint "=&r" currently lose the early clobber flag
and turn into "=r" when converted to LLVM-IR. This patch correctly passes it on.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D7346

llvm-svn: 228143

llvm-svn: 228142

A previous commit added Cortex-A72 to LLVM, this teaches Clang to
accept it as well.

Patch by Ranjeet Singh.

llvm-svn: 228141

Currently, Cortex-A72 is modelled as an Cortex-A57 except the fp
load balancing pass isn't enabled for Cortex-A72 as it's not
profitable to have it enabled for this core.

Patch by Ranjeet Singh.

llvm-svn: 228140

llvm-svn: 228139

Otherwise, this can lead to unexpected results when AST matching as
some nodes are only present in the semantic form.

For example, only looking at the syntactic form does not find the
DeclRefExpr to f() in:

  struct S { S(void (*a)()); };
  void f();
  S s[1] = {&f};

llvm-svn: 228138

to fix the interface_symbols_darwin.c test.

llvm-svn: 228137

llvm-svn: 228136

This associates movss and movsd with the packed single and packed double
execution domains (resp.). While this is largely cosmetic, as we now
don't have weird ping-pong-ing between single and double precision, it
is also useful because it avoids the domain fixing algorithm from seeing
domain breaks that don't actually exist. It will also be much more
important if we have an execution domain default other than packed
single, as that would cause us to mix movss and movsd with integer
vector code on a regular basis, a very bad mixture.

llvm-svn: 228135

Summary: This reduces the bloat in the source tree and makes the tests more consistent.

Reviewers: vharron, zturner

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D7373

llvm-svn: 228134

a register. We have lots of tests covering this.

llvm-svn: 228133

version of the script.

Changes include:
- Using the VEX prefix
- Skipping more detail when we have useful shuffle comments to match
- Matching more shuffle comments that have been added to the printer
  (yay!)
- Matching the destination registers of some AVX instructions
- Stripping trailing whitespace that crept in
- Fixing indentation issues

Nothing interesting going on here. I'm just trying really hard to ensure
these changes don't show up in the diffs with actual changes to the
backend.

llvm-svn: 228132

This is done in a bit of a strange way to use a multiline RE instead of
looping over the lines. Suggestions welcome here for a more pythonic way
of doing this as long as its reasonably fast.

llvm-svn: 228131

Summary:
Both LLDB and LLGS are leaking file descriptors into the debugged process. This plugs the leak by
closing the unneeded descriptors. In one case I use O_CLOEXEC, which I hope is supported on
relevant platforms. I also added a regression test and plugged a fd leak in dosep.py.

Reviewers: vharron, clayborg

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D7372

llvm-svn: 228130

This reverts patches 223862, 224198, 224203, and 224754, which were all
related to the vector load/store combining and were reverted/reaplied
a few times due to the same alignment problems we're seeing now.

Further tests, mainly self-hosting Clang, will be needed to reapply this
patch in the future.

llvm-svn: 228129

lldb-mi has 3 threads.
1. One that waits for user intput.
2. Another waits for 1st thread to get input command.
3. Waits for events from lldb.

2 & 3 needs to be synchronized so that they don't end up
doing things at same time. For example, while "break insert" is
processing, we can get a breakpoint event. Depending on where we
are in "break-insert", it can have different behavior. In some
cases, it can cause breakpoint to be deleted too. I have added a 
mutex so that command processing and event processing are done 
exclusively and they are not running at the same time.

In longer term, I think thread 2 & 3 should be merged to be only 
one thread which can wait on command or events.

Reviewed in http://reviews.llvm.org/D7371.

llvm-svn: 228128

instructions.

No actual change here.

llvm-svn: 228127

zero for v8i16 as well.

These exhibit the same domain badness, but also exhibit other weaknesses
in our blend lowering. More fixes to come.

llvm-svn: 228126

Differential Revision: http://reviews.llvm.org/D7342

llvm-svn: 228125

This is the simplest form of bit-math based blending which only fires
when we are blending with zero and is relatively profitable. I've only
enabled this path on very specific lowering strategies. I'm planning to
widen its applicability in subsequent patches, but so far you'll notice
that even though we get fewer shufps instructions, we *still* do the bit
math in the FP execution port. I'm looking into why this is still
happening.

llvm-svn: 228124

Specifically, the existing patterns were scalar-only. These cover the
packed vector bitwise operations when specifically requested with pseudo
instructions. This is particularly important in SSE1 where we can't
actually emit a logical operation on a v2i64 as that isn't a legal type.

This will be tested in subsequent patches which form the floating point
and patterns in more places.

llvm-svn: 228123