Commits · e311cdd18d21e8aae6ff54bd0cab47bf1bcc4325 · Roger Ferrer / llvm-epi · GitLab

Oct 03, 2021
- [X86] Add SSE2/AVX1/AVX512BW test coverage to interleaved load/store tests · 31d0c8f3
  Simon Pilgrim authored Oct 03, 2021
  31d0c8f3
- Re-apply the fix on DwarfEHPrepare and add a test · e8806d74
  Takafumi Arakaki authored Oct 02, 2021
  e8806d74
Oct 02, 2021
- Revert "[RISCV] Add an GPR def to the Zvlseg SPILL/RELOAD pseudos" · 33d20977
  Craig Topper authored Oct 02, 2021
  33d20977
- [X86][SSE] Fix typo + infinite-loop in HOP(HOP'(X,X),HOP'(Y,Y)) fold (PR52040) · 9452ec72
  Simon Pilgrim authored Oct 02, 2021
  9452ec72
- [X86] decomposeMulByConstant - decompose legal vXi32 multiplies on SlowPMULLD... · bb42cc20
  Simon Pilgrim authored Oct 01, 2021
  bb42cc20
- [AArch64][GlobalISel] Lower G_SMULH/G_UMULH unless its one of the supported types. · f41a9cf8
  Amara Emerson authored Oct 01, 2021
  f41a9cf8
- [AArch64][GlobalISel] Change G_ANYEXT fed by scalar G_ICMP to G_ZEXT · 96843d22
  Jessica Paquette authored Oct 01, 2021
  96843d22
Oct 01, 2021
- [NFC][PowerPC] Add test case for byval store. · 40f382ad
  Stefan Pintilie authored Oct 01, 2021
  40f382ad
- [DAG] scalarizeExtractedVectorLoad - replace getABITypeAlign with allowsMemoryAccess (PR45116) · df672f66
  Simon Pilgrim authored Oct 01, 2021
  df672f66
- [TwoAddressInstruction] Tweak constraining of tied operands · dff3454b
  Jay Foad authored Oct 01, 2021
  dff3454b
- [TwoAddressInstruction] Pre-commit a test case for D110944 · 61ecfc6f
  Jay Foad authored Oct 01, 2021
  
  61ecfc6f
- [NFC][X86][Codegen] Add test coverage for interleaved i8 load/store stride=4 · 3c407196
  Roman Lebedev authored Oct 01, 2021
  
  3c407196
- [NFC][Codegen][X86] Drop unused check prefixes in newly added tests · 907d5da3
  Roman Lebedev authored Oct 01, 2021
  
  907d5da3
- [NFC][X86][Codegen] Add test coverage for interleaved i8 load/store stride=3 · 657e1e31
  Roman Lebedev authored Oct 01, 2021
  
  657e1e31
- [SelectionDAG] Handle promotion + widening in getCopyToPartsVector · b62e6f19
  Sander de Smalen authored Sep 16, 2021
  b62e6f19
Sep 30, 2021
- [GlobalISel] Extend CombinerHelper::matchConstantOp() to match constant splat vectors. · ca8316b7
  Amara Emerson authored Sep 30, 2021
  ca8316b7
- [RISCV] Remove Zbproposedc extension · a21c5579
  Craig Topper authored Sep 30, 2021
  a21c5579
- [PowerPC] Improved codegen related to xscvdpsxws/xscvdpuxws · 4195ed99
  Albion Fung authored Sep 30, 2021
  4195ed99
- [GlobalISel] Extend G_SELECT of known condition combine to vectors. · 80f4bb5c
  Amara Emerson authored Sep 29, 2021
  80f4bb5c
- [x86] add test for 3 fcmps and logic; NFC · 97948620
  Sanjay Patel authored Sep 30, 2021
  97948620
- [NFC][X86][Codegen] Add test coverage for interleaved i64 load/store stride=2 · 3bd02ec9
  Roman Lebedev authored Sep 30, 2021
  
  3bd02ec9
- [ARM] Add more MVE intrinsics to sink splats to · f9aa8623
  David Green authored Sep 30, 2021
  f9aa8623
- [AArch64][GlobalISel] Re-generate some tests for D110802. · 2e7deee3
  Amara Emerson authored Sep 30, 2021
  
  2e7deee3
- Second Recommit "[AArch64] Split bitmask immediate of bitwise AND operation" · 13f3c39f
  Jingu Kang authored Sep 29, 2021
  13f3c39f
- [LiveIntervals] Remove unused subreg ranges in repairIntervalsInRange · 156d7d2d
  Jay Foad authored Sep 27, 2021
  156d7d2d
- AMDGPU: Broadcast scalar boolean to vector boolean explicitly · 52785989
  Ruiling Song authored Sep 16, 2021
  52785989
- [AArch64][GlobalISel] Widen G_BUILD_VECTOR source & dest element types to s8. · 1c0e8a98
  Amara Emerson authored Sep 29, 2021
  
  1c0e8a98
Sep 29, 2021
- [NFC][X86][Codegen] Add test coverage for interleaved i32 load/store stride=2 · 7dffb8b4
  Roman Lebedev authored Sep 29, 2021
  
  7dffb8b4
- [Mangler] Calculate the argument list byte count suffix correctly when returning large values · 2dd88343
  Wesley Wiser authored Sep 29, 2021
  2dd88343
- [PowerPC] swdiv builtins for XL compatibility · 67a3d1e2
  Quinn Pham authored Jul 22, 2021
  67a3d1e2
- [AArch64] Enable type promotion for AArch64 · 8a645fc4
  David Green authored Sep 29, 2021
  8a645fc4
- [AArch64] Add TypePromotion tests and regenerate atomic test check lines · a8031c92
  David Green authored Sep 29, 2021
  a8031c92
- [NFC][X86] Add codegen test coverage for interleaved load/store i8 stride=2 · 465d2adb
  Roman Lebedev authored Sep 29, 2021
  
  465d2adb
- [PowerPC] Implement builtin for vbpermd · 09b67aa1
  Nemanja Ivanovic authored Sep 29, 2021
  09b67aa1
- [SelectionDAG] Make WidenVecRes_EXTRACT_SUBVECTOR work for scalable vectors. · 6709b193
  Sander de Smalen authored Sep 29, 2021
  6709b193
- [AArch64][SVE] Fix extract_subvector patterns for unpacked fp types. · 87bcbd61
  Sander de Smalen authored Sep 28, 2021
  87bcbd61
- [X86] Fix handling of i128<->fp on Windows · d6216e2c
  Martin Storsjö authored Sep 23, 2021
  d6216e2c
- [AArch64][GlobalISel] Add selection tests for vector G_UMULH/G_SMULH. · b2b122dd
  Amara Emerson authored Sep 29, 2021
  b2b122dd
- [AArch64][GlobalISel] Make some vector G_SMULH/G_UMULH legal. · e6ed880e
  Amara Emerson authored Sep 29, 2021
  
  e6ed880e
- Revert "Recommit "[AArch64] Split bitmask immediate of bitwise AND operation"" · c07f7099
  Sterling Augustine authored Sep 28, 2021
  c07f7099