Commits · f208c659fb76b1ad8ae83dd10c4f0c30986d48ee · Roger Ferrer / llvm-epi

"parallel-libs/.arcconfig" did not exist on "3017efb71040ee4f88bfb0490d35aee20667471f"

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Aug 03, 2020
- [X86] Make ENDBR instruction a scheduling boundary · f208c659
  Joao Moreira authored Aug 03, 2020
  f208c659
- [X86][SSE] Shuffle combine blends to OR(X,Y) if the relevant elements are known zero. · 219f32f4
  Simon Pilgrim authored Aug 03, 2020
  219f32f4
- [X86] Use h-register for final XOR of __builtin_parity on 64-bit targets. · ac82b918
  Craig Topper authored Aug 03, 2020
  ac82b918
- [FPEnv] Don't transform FSUB(-0,X)->FNEG(X) in SelectionDAGBuilder. · 31c7a2fd
  Cameron McInally authored Aug 03, 2020
  31c7a2fd
- AMDGPU/GlobalISel: Remove old hacks for boolean selection · 2414bab5
  Matt Arsenault authored Jul 26, 2020
  2414bab5
- AMDGPU/GlobalISel: Apply load bitcast to s.buffer.load intrinsic · fd63e469
  Matt Arsenault authored Jun 16, 2020
  fd63e469
- [X86][SSE] Start shuffle combining from ANY_EXTEND_VECTOR_INREG on SSE targets · 99a971ca
  Simon Pilgrim authored Aug 03, 2020
  99a971ca
- AMDGPU/GlobalISel: Fix selecting broken copies for s32->s64 anyext · d8ef1d12
  Matt Arsenault authored Jul 22, 2020
  d8ef1d12
- [ARM] Fix IT block generation after Thumb2SizeReduce with -Oz · 18279a54
  Nicholas Guy authored Jul 01, 2020
  18279a54
- [MC] Default MCAsmBackend::mayNeedRelaxation() to false · 40da58a0
  Fangrui Song authored Aug 02, 2020
  
  40da58a0
- [NFC][PowerPC] Add a multiclass for fsetcc to define them in a uniform way · 62e46446
  QingShan Zhang authored Aug 03, 2020
  62e46446
- [RISCV] eliminate the repetition declare of SDLoc DL · a96921af
  StephenFan authored Jul 31, 2020
  a96921af
Aug 02, 2020
- [X86] Use parity flag from byte test/cmp instruction for __builtin_parity when... · 64516ec7
  Craig Topper authored Aug 02, 2020
  64516ec7
- GlobalISel: Implement bitcast action for G_EXTRACT_VECTOR_ELEMENT · 212570ab
  Matt Arsenault authored Jun 15, 2020
  212570ab
- X86InstrInfo.cpp - fix include ordering. NFCI. · 00d0f354
  Simon Pilgrim authored Aug 02, 2020
  
  00d0f354
- Use merge null and isa<> tests into isa_and_nonnull<>. NFCI. · 7dd4f035
  Simon Pilgrim authored Aug 02, 2020
  
  7dd4f035
- [DAG] TargetLowering::LowerAsmOutputForConstraint - pass SDLoc as const& · d14a22da
  Simon Pilgrim authored Aug 02, 2020
  d14a22da
- [X86] Use const APInt& in for-range loop to avoid unnecessary copies. NFCI. · 20fbbbc5
  Simon Pilgrim authored Aug 02, 2020
  20fbbbc5
- [X86] Pass SDLoc by const reference. NFCI. · d7e26167
  Simon Pilgrim authored Aug 02, 2020
  
  d7e26167
- [X86] Use const APInt& in for-range loop to avoid unnecessary copies. NFCI. · 3f276840
  Simon Pilgrim authored Aug 02, 2020
  3f276840
- [X86] combineX86ShuffleChain - pull out repeated RootVT.getSizeInBits() calls. NFCI. · 2700311c
  Simon Pilgrim authored Aug 02, 2020
  
  2700311c
- [X86] Improve parity idiom recognition to handle (and (truncate (ctpop X)), 1). · 56166a3a
  Craig Topper authored Aug 01, 2020
  56166a3a
- Use llvm::is_contained where appropriate (NFC) · 60434989
  Kazu Hirata authored Aug 01, 2020
  60434989
Aug 01, 2020
- [X86] Add assembler support for {disp8} and {disp32} to control the size of... · e297d928
  Craig Topper authored Aug 01, 2020
  e297d928
- [X86][AVX512] Fold concat(and(x,y),and(z,w)) -> and(concat(x,z),concat(y,w)) for 512-bit vectors · 82a5c848
  Simon Pilgrim authored Aug 01, 2020
  82a5c848
- [X86][AVX] Ensure we only combine to PSHUFLW/PSHUFHW on supporting targets · bb13c34c
  Simon Pilgrim authored Aug 01, 2020
  bb13c34c
- [ARM] Distribute post-inc for Thumb2 sign/zero extending loads/stores · fd69df62
  David Green authored Aug 01, 2020
  fd69df62
- [X86][AVX] Extend v2f64 BROADCAST(LOAD) -> BROADCAST_LOAD to v2i64/v4f32/v4i32 · 1b190153
  Simon Pilgrim authored Aug 01, 2020
  1b190153
- [X86] Refactor the broadcast and load folding in tryVPTESTM to reduce some code. · 75f134ee
  Craig Topper authored Jul 31, 2020
  75f134ee
- [X86] Use TargetLowering::getRegClassFor to simplify some code in tryVPTESTM. NFCI · 1bd7046e
  Craig Topper authored Jul 31, 2020
  
  1bd7046e
- PowerPC: Don't lower SELECT_CC to PPCISD::FSEL on SPE · 7e9153e9
  Justin Hibbits authored Apr 08, 2020
  7e9153e9
- PowerPC: Fix SPE extloadf32 handling. · 914dbf48
  Justin Hibbits authored Apr 16, 2020
  914dbf48
- [VE] Change calling convention to follow ABI · 605fd4d7
  Kazushi (Jam) Marukawa authored Jul 11, 2020
  605fd4d7
- [AArch64][SVE] Allow vector of pointers as legal type for masked load/store. · 01bfe2e4
  Huihui Zhang authored Jul 31, 2020
  01bfe2e4
- [X86] Simplify vpternlog immediate selection. · 93c678a7
  Craig Topper authored Jul 31, 2020
  93c678a7
- Upgrade MC to v0.9. · 47a4a27f
  Hsiangkai Wang authored May 21, 2020
  47a4a27f
Jul 31, 2020
- [Loop Peeling] Separate the Loop Peeling Utilities from the Loop Unrolling Utilities · b7cfa6ca
  Sidharth Baveja authored Jul 31, 2020
  b7cfa6ca
- [PowerPC] Add Vector String Isolate instruction definitions and MC Tests · 93fd8dbd
  Albion Fung authored Jul 31, 2020
  93fd8dbd
- Hide some internal symbols. NFC. · c6f08b14
  Benjamin Kramer authored Jul 31, 2020
  
  c6f08b14
- Support addrspacecast initializers with isNoopAddrSpaceCast · 57bd64ff
  Matt Arsenault authored May 27, 2016
  57bd64ff