Commits · d9ab3e82f30d646deff054230b0c742704a1cf26 · Roger Ferrer / llvm-epi · GitLab

Dec 27, 2022
- [clang] Use a StringRef instead of a raw char pointer to store builtin and call information · d9ab3e82
  serge-sans-paille authored Dec 26, 2022
  d9ab3e82
- Revert "[libc][NFC] Add -fno-lax-vector-conversions compilation flag" · d065472c
  Guillaume Chatelet authored Dec 27, 2022
  d065472c
- [libc][NFC] Add -fno-lax-vector-conversions compilation flag · 32f4c3f1
  Guillaume Chatelet authored Dec 27, 2022
  
  32f4c3f1
- [NFC][Clang][RISCV] Rename data member 'DefaultPolicy' to 'PolicyAttrs' · 1deb6bce
  eopXD authored Dec 22, 2022
  1deb6bce
- [RFC][OpenMP] Update to Python3 for lit test · 40079637
  Shilei Tian authored Dec 26, 2022
  40079637
- [Test] Add tests with logical AND/OR · ba2bb635
  Max Kazantsev authored Dec 27, 2022
  
  ba2bb635
- [mlir] Include type_traits to support latest libc++ · 4597292d
  Fangrui Song authored Dec 26, 2022
  4597292d
- [libc++] Granularize <type_traits> includes in <iterator> · 430b397f
  Nikolas Klauser authored Dec 20, 2022
  430b397f
- [mlir] Typos in affine dialect · 9a97296d
  Kai Sasaki authored Dec 27, 2022
  
  9a97296d
Dec 26, 2022
- [VPlan] Remove redundant blocks by merging them into predecessors. · 36d70a6a
  Florian Hahn authored Dec 26, 2022
  36d70a6a
- [DAGCombine] `combineShuffleToZeroExtendVectorInReg()`: widen shuffle elements... · c4f815d7
  Roman Lebedev authored Dec 26, 2022
  c4f815d7
- [NFC][X86] Add some tests that can be matched as ZERO_EXTEND_VECTOR_INREG · cc051b07
  Roman Lebedev authored Dec 27, 2022
  
  cc051b07
- [DAG] `combineShuffleToZeroExtendVectorInReg()`: try to match w/ commuted operands · e26e7ed6
  Roman Lebedev authored Dec 26, 2022
  e26e7ed6
- [AArch64] Custom lower `ISD::ZERO_EXTEND_VECTOR_INREG` · 83288f80
  Roman Lebedev authored Dec 26, 2022
  83288f80
- [DAGCombiner] Add a most basic `combineShuffleToZeroExtendVectorInReg()` · 62fc5f16
  Roman Lebedev authored Dec 25, 2022
  62fc5f16
- [NFC][AArch64] Add a few vector shuffle tests that should be `zip1` · 46458aad
  Roman Lebedev authored Dec 26, 2022
  46458aad
- Commit changes to the Code of Conduct that make it more clear regarding... · bb778cf3
  tlattner authored Dec 26, 2022
  bb778cf3
- [InstCombine] do not add "nuw" to 1<<X if the "1" has undefined elements · a0c80172
  Sanjay Patel authored Dec 26, 2022
  a0c80172
- [InstCombine] replace undef in vector tests with poison; NFC · 00c78401
  Sanjay Patel authored Dec 26, 2022
  00c78401
- [lldb] [utils] Fix linking lit-cpuid to LLVM dylib · dfc20708
  Michał Górny authored Dec 26, 2022
  dfc20708
- Revert "[IPSCCP] Enable specialization of functions." · 60359f56
  Florian Hahn authored Dec 26, 2022
  60359f56
- [TwoAddressInstruction] Constrain RegClass when processing a statepoint · 821a5958
  Danila Malyutin authored Dec 23, 2022
  821a5958
- [Xtensa 10/10] Add relaxations and fixups. Add rest part of Xtensa Core Instructions · ff25800d
  Andrei Safronov authored Dec 26, 2022
  ff25800d
- [Xtensa 9/10] Add basic support of Xtensa disassembler · 71199af1
  Andrei Safronov authored Dec 26, 2022
  71199af1
- [Xtensa 8/10] Add support of the Xtensa shift/load/store/move and processor control instructions · 4e0c1d98
  Andrei Safronov authored Dec 26, 2022
  4e0c1d98
- [Xtensa 7/10] Add Xtensa instruction printer · 2758a013
  Andrei Safronov authored Dec 26, 2022
  2758a013
- [Xtensa 6/10] Add Xtensa basic assembler parser · 52ecf023
  Andrei Safronov authored Dec 26, 2022
  52ecf023
- [Xtensa 5/10] Add Xtensa MCTargetDescr initial functionality · 60172097
  Andrei Safronov authored Dec 26, 2022
  60172097
- [Xtensa 4/10] Add basic *td files with Xtensa architecture description · 8a655201
  Andrei Safronov authored Dec 26, 2022
  8a655201
- [Xtensa 3/10] Add initial version of the Xtensa backend · 52804a7f
  Andrei Safronov authored Dec 26, 2022
  52804a7f
- [Xtensa 2/10] Add Xtensa ELF definitions · 310f7652
  Andrei Safronov authored Dec 26, 2022
  310f7652
- [Xtensa 1/10] Recognize Xtensa in triple parsing code · 8c618e8f
  Andrei Safronov authored Dec 26, 2022
  8c618e8f
- [LoongArch][test] Regenerate checks for the ghc-cc.ll test case · 77fad4c3
  WANG Xuerui authored Dec 26, 2022
  77fad4c3
- [LoongArch] Add GHC Calling Convention · 389079c8
  Lin Runze authored Dec 26, 2022
  389079c8
- [clang] [OpenMP] Test amdgcn_openmp_device_math_c.c test on 32-bit platforms · dab67c66
  Michał Górny authored Dec 26, 2022
  dab67c66
- [Test] Update inverse test for turn-to-invariant to what they meant to be · 5f24f893
  Max Kazantsev authored Dec 26, 2022
  5f24f893
- [IndVars][NFC] Factor out condition creation in optimizeLoopExitWithUnknownExitCount · df8cedfc
  Max Kazantsev authored Dec 26, 2022
  df8cedfc
- [Test] Add test showing potential conflict b/w AND elimination and IV widening · d02c3b13
  Max Kazantsev authored Dec 26, 2022
  
  d02c3b13
- Revert "[clang] Use a StringRef instead of a raw char pointer to store builtin... · aa171833
  Vitaly Buka authored Dec 25, 2022
  aa171833
- [NFC][Clang][RISCV] Reduce for-loop with SmallVector utility · 904a79f9
  eopXD authored Dec 25, 2022
  904a79f9