Commits · e9ac99b6090c125091b61240c75dcc403d569472 · Roger Ferrer / llvm-epi · GitLab

May 26, 2022
- [RISCV] Simplfy creation of IndexVT in lowerMaskedGather/lowerMaskedScatter. NFC · e9ac99b6
  Craig Topper authored May 26, 2022
  e9ac99b6
- Give option to use isCopyInstr to determine which MI is · 7c13ae64
  Adrian Tong authored May 04, 2022
  7c13ae64
- [Target] use getSubtarget<> instead of static_cast<>(getSubtarget()) · ad73ce31
  Zongwei Lan authored May 26, 2022
  ad73ce31
- [Clang][CoverageMapping] Fix switch counter codegen compile time explosion · ce54b226
  Bruno Cardoso Lopes authored May 24, 2022
  ce54b226
- [SCEV] Collect conditions from assumes same way as for branches. · 6af5f569
  Florian Hahn authored May 26, 2022
  6af5f569
- [ARM] Recognize t2LoopEnd for software pipelining · 917dc074
  David Penry authored Mar 28, 2022
  917dc074
- Revert "Replace the custom linked list in LeaderTableEntry with TinyPtrVector." · 939a4346
  Owen Anderson authored May 26, 2022
  939a4346
- [RISCV] reorganize getFrameIndexReference to reduce code duplication [nfc] · d58cc083
  Philip Reames authored May 26, 2022
  d58cc083
- [ControlHeightReduction] Use logical and · c8eb83f2
  Nikita Popov authored May 26, 2022
  c8eb83f2
- [RISCV] Allow compatible VTYPE in AVL Reg Forward cases · afe49934
  Philip Reames authored May 26, 2022
  afe49934
- [SLP]Improve compile time, NFC. · 7b809c30
  Alexey Bataev authored May 25, 2022
  7b809c30
- [SLP]Fix PR55653: emit undefs where required, not poison. · 120d52b0
  Alexey Bataev authored May 24, 2022
  120d52b0
- [DFAJumpThreading] Relax analysis to handle unpredictable initial values · 8b0d7634
  Alex Zhikhartsev authored May 25, 2022
  8b0d7634
- [SLP] Move canVectorizeLoads implementation to simplify the diff in D105986. NFC. · 14258d6f
  Simon Pilgrim authored May 26, 2022
  
  14258d6f
- [PowerPC][Future] Add an ISA Future to go with mcpu=future. · 610eb39c
  Stefan Pintilie authored May 26, 2022
  610eb39c
- [SLP]Fix crash on reordering of ScatterVectorize nodes. · 9139d484
  Alexey Bataev authored May 25, 2022
  9139d484
- [InstCombine] fold icmp equality with udiv and large constant · 3952c905
  Sanjay Patel authored May 26, 2022
  3952c905
- [DAG] Generalize (sra (trunc (sra x, c1)), c2) -> (trunc (sra x, c1 + c2)) constant folding · f366acdb
  Simon Pilgrim authored May 26, 2022
  f366acdb
- [AMDGPU][GFX9] Support base+soffset+offset SMEM loads. · b0ccf38b
  Ivan Kosarev authored May 26, 2022
  b0ccf38b
- [DAG] Cleanup "and/or of cmp with single bit diff" fold to use ISD::matchBinaryPredicate · 7b617eef
  Simon Pilgrim authored May 26, 2022
  7b617eef
- [MachineSink] replace MachineLoop with MachineCycle · d7927523
  Chen Zheng authored Apr 19, 2022
  d7927523
- [FileCheck] Catch missspelled directives. · ad1d60c3
  Ivan Kosarev authored May 26, 2022
  ad1d60c3
- [RISCV][NFC] Add braces to 'else' to match braced 'if' · 2c9983f5
  Fraser Cormack authored May 26, 2022
  
  2c9983f5
- [SimpleLoopUnswitch] Always skip trivial select and set condition. · f96aa493
  Florian Hahn authored May 26, 2022
  f96aa493
- [RISCV] Fix state persistence bugs (PR55548) · e45087fd
  Kito Cheng authored May 20, 2022
  e45087fd
- [LV] Fix indentation in tryToCreateWidenRecipe (NFC). · 390c0ac2
  Florian Hahn authored May 26, 2022
  
  390c0ac2
- [MC] Lower case the first letter of EmitCOFF* EmitWin* EmitCV*. NFC · 9ee15bba
  Fangrui Song authored May 26, 2022
  
  9ee15bba
- Replace the custom linked list in LeaderTableEntry with TinyPtrVector. · 1e911498
  Owen Anderson authored May 08, 2022
  1e911498
- [GuardWidening] Remove nuw/nsw flags for hoisted instructions · c2eccc67
  Serguei Katkov authored May 25, 2022
  c2eccc67
- [iwyu] Handle regressions in libLLVM header include · fb67d683
  serge-sans-paille authored May 25, 2022
  fb67d683
- [InstCombine] [NFC] refector foldXorOfICmps · 1486a9c9
  Chenbing Zheng authored May 26, 2022
  1486a9c9
- [InstCombine] bitcast(logic(bitcast(X), bitcast(Y))) -> bitcast'(logic(bitcast'(X), Y)) · 41aab93a
  Chenbing Zheng authored May 26, 2022
  41aab93a
- [RISCV] Replace ISD::FP_EXTEND and ISD::FP_ROUND with RVV VL op. · b271488e
  Jianjian GUAN authored May 11, 2022
  b271488e
- [LegalizeTypes][VP] Add widen and split support for VP_TRUNCATE · 8aa6b05d
  Lian Wang authored May 19, 2022
  8aa6b05d
May 25, 2022
- [SLP]Do not try to generate ScatterVectorize if it will be scalarized. · 3bf5c2c8
  Alexey Bataev authored May 25, 2022
  3bf5c2c8
- [memprof] Keep and display symbol names in the RawMemProfReader. · ec51971e
  Snehasish Kumar authored May 24, 2022
  ec51971e
- [SLP]Fix PR55688: Miscompile due to incorrect nuw/nsw handling. · 10f41a21
  Alexey Bataev authored May 25, 2022
  10f41a21
- [MCDisassembler] Disambiguate Size parameter in tryAddingSymbolicOperand() · bed9efed
  Maksim Panchenko authored May 19, 2022
  bed9efed
- Round up zero-sized symbols to 1 byte in `.debug_aranges`. · 256a52d9
  Patrick Walton authored May 25, 2022
  256a52d9
- [AMDGPU] gfx11 FLAT Instructions · 835e09c4
  Joe Nash authored May 10, 2022
  835e09c4